| commit | 468532a912457a70e7b738924c74386521d39256 | [log] [tgz] |
|---|---|---|
| author | Yenkai Wang <ykwang@google.com> | Wed Dec 20 20:17:06 2023 -0600 |
| committer | Yenkai Wang <ykwang@google.com> | Tue Jan 02 17:38:11 2024 -0600 |
| tree | 74fa180f3322a2e7e7f2467895303e3cefff9066 | |
| parent | aaf3e5456ee29ec15835a4a7b79b5771845b5d91 [diff] |
Add macro definition for srams in ML core Change-Id: I9cbe391f9cafdefecff706e8ea75a94ea7ee9eec
Kelvin is a RISC-V32IM core with a custom instruction set.
More information on the design can be found in the overview.
Kelvin uses bazel as it's build system. The Verilated simulator for Kelvin can be generated using:
bazel build //tests/verilator_sim:core_sim
The verilog source for the Kelvin core can be generated using:
bazel build //hdl/chisel:core_cc_library_emit_verilog
Verilog source for the Matcha SoC can be generated using:
bazel clean --expunge # To generate the ToT sha bazel build //hdl/chisel:matcha_kelvin_verilog