| commit | 907eafd7c2e01cba545c1bd67575b60143c18b09 | [log] [tgz] |
|---|---|---|
| author | Derek Chow <derekjchow@google.com> | Tue Apr 02 21:38:49 2024 +0000 |
| committer | Gerrit Code Review <noreply-gerritcodereview@google.com> | Tue Apr 02 21:38:49 2024 +0000 |
| tree | 6758ac192c478b9b6600589cc6c1af30ea4f18fb | |
| parent | 73f9f6974ac428c65a947d667a8b0d336599d30a [diff] | |
| parent | 8477fa8bef38dff634146c1d33ab4a036ef1003a [diff] |
Merge "Disable assert in FifoX."
Kelvin is a RISC-V32IM core with a custom instruction set.
More information on the design can be found in the overview.
Kelvin uses bazel as it's build system. The Verilated simulator for Kelvin can be generated using:
bazel build //tests/verilator_sim:core_sim
The verilog source for the Kelvin core can be generated using:
bazel build //hdl/chisel:core_cc_library_emit_verilog
Verilog source for the Matcha SoC can be generated using:
bazel clean --expunge # To generate the ToT sha bazel build //hdl/chisel:matcha_kelvin_verilog