| commit | 21d428a75bf775d9bf81967cc4a04af3dbc29114 | [log] [tgz] |
|---|---|---|
| author | Alex Van Damme <atv@google.com> | Mon Jul 14 14:53:17 2025 -0700 |
| committer | Alex Van Damme <atv@google.com> | Tue Jul 22 14:50:35 2025 -0700 |
| tree | d9f4cef9efc27abbbe787afe2b6a3bf3f66cb64a | |
| parent | d0fe66300823a02583fdb94db3dc3510118995f2 [diff] |
Improve cocotb Bazel rules
- Introduces cocotb_test_suite, which defines a test suite that can
target both Verilator and VCS from one rule. This rule creates a
target which will run the whole suite, and then also accepts a
testcases list which will be used to create single-test targets.
- Add utils/update_all_cocotb_tests.py to keep the aforementioned
testcase lists up-to-date.
- Rules generated by this way are highly queriable to find lists of
tests to run, e.g.
For finding all suites that use the RvvCoreMiniAxi HDL on VCS:
- bazel query 'kind("cocotb_test", //...) intersect attr("tags", "vcs_cocotb_test_suite", //...) intersect attr("hdl_toplevel", "^RvvCoreMiniAxi$", //...)'
For finding all individual tests that use the RvvCoreMiniAxi HDL on VCS:
- bazel query 'kind("cocotb_test", //...) intersect attr("tags", "vcs_cocotb_single_test", //...) intersect attr("hdl_toplevel", "^RvvCoreMiniAxi$", //...)'
Change-Id: I5c639b703c3c062ef37480d3aac32418761fcab2
Kelvin is a RISC-V32IM core with a custom instruction set.
More information on the design can be found in the overview.
Kelvin uses bazel as it's build system. The Verilated simulator for Kelvin can be generated using:
bazel build //tests/verilator_sim:core_sim
The verilog source for the Kelvin core can be generated using:
bazel build //hdl/chisel/src/kelvin:core_cc_library_emit_verilog
Verilog source for the Matcha SoC can be generated using:
bazel clean --expunge # To generate the ToT sha bazel build //hdl/chisel:matcha_kelvin_verilog