commit | d0fe66300823a02583fdb94db3dc3510118995f2 | [log] [tgz] |
---|---|---|
author | Derek Chow <derekjchow@google.com> | Mon Jul 21 12:50:52 2025 -0700 |
committer | Derek Chow <derekjchow@google.com> | Mon Jul 21 12:53:31 2025 -0700 |
tree | b3f04f8f214f1819188dc47e508179baa6c4b3c7 | |
parent | 3cf90837458bd08c263be81016b3ae4708d23cc2 [diff] |
Parameterize RvvCore.scala based on VL. Change-Id: I35bd6edd2f1ac39a721828cac0857f8935dbc4ad
Kelvin is a RISC-V32IM core with a custom instruction set.
More information on the design can be found in the overview.
Kelvin uses bazel as it's build system. The Verilated simulator for Kelvin can be generated using:
bazel build //tests/verilator_sim:core_sim
The verilog source for the Kelvin core can be generated using:
bazel build //hdl/chisel/src/kelvin:core_cc_library_emit_verilog
Verilog source for the Matcha SoC can be generated using:
bazel clean --expunge # To generate the ToT sha bazel build //hdl/chisel:matcha_kelvin_verilog