commit | 2c785ad5bef96cdb0f752397a29aee55e1e6499a | [log] [tgz] |
---|---|---|
author | Derek Chow <derekjchow@google.com> | Mon Jul 14 14:56:25 2025 -0700 |
committer | Derek Chow <derekjchow@google.com> | Mon Jul 14 15:36:01 2025 -0700 |
tree | 40858dc373620a98690fde985dc0ab40e3ab0020 | |
parent | 57b39181717bd483ca9cb3c402b48a50f08e6cba [diff] |
Create filgroup targets for test binaries. This helps with discoverability of sharable test binaries. Change-Id: I5d61027f8cca84d98da3e8f97d3714a3b5c7f77f
Kelvin is a RISC-V32IM core with a custom instruction set.
More information on the design can be found in the overview.
Kelvin uses bazel as it's build system. The Verilated simulator for Kelvin can be generated using:
bazel build //tests/verilator_sim:core_sim
The verilog source for the Kelvin core can be generated using:
bazel build //hdl/chisel/src/kelvin:core_cc_library_emit_verilog
Verilog source for the Matcha SoC can be generated using:
bazel clean --expunge # To generate the ToT sha bazel build //hdl/chisel:matcha_kelvin_verilog