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opensecura / hw / kelvin / 57b39181717bd483ca9cb3c402b48a50f08e6cba
commit57b39181717bd483ca9cb3c402b48a50f08e6cba[log] [tgz]
authorAlex Van Damme <atv@google.com>Thu Jul 10 11:38:32 2025 -0700
committerAlex Van Damme <atv@google.com>Mon Jul 14 13:16:57 2025 -0700
tree8579d29db0bbba14104c3b8fd874d5934a29565d
parented78b7032e8a152f93eada1443afee282901fed6 [diff]
Add tests for RVV reduction operations

- Tests vredmin, vredmax, vredsum.
- Also uses vmv to move from vector->scalar, so some additional coverage
  for that.

Change-Id: I6f6bd52cc0bbb012279d4635a34d25cc0727f67b
5 files changed
tree: 8579d29db0bbba14104c3b8fd874d5934a29565d
  1. doc/
  2. examples/
  3. external/
  4. hdl/
  5. hw_sim/
  6. kelvin_test_utils/
  7. lib/
  8. platforms/
  9. rules/
  10. tests/
  11. third_party/
  12. toolchain/
  13. utils/
  14. .bazelrc
  15. .bazelversion
  16. .gitignore
  17. CONTRIBUTING.md
  18. LICENSE
  19. PREUPLOAD.cfg
  20. README.md
  21. WORKSPACE
README.md

Kelvin

Kelvin is a RISC-V32IM core with a custom instruction set.

Kelvin block diagram

More information on the design can be found in the overview.

Getting Started

  • If you are hardware engineer looking to integrate Kelvin into your design, check out our integration guide.
  • If you are a software engineer looking to write code for Kelvin, start with this tutorial.

Building

Kelvin uses bazel as it's build system. The Verilated simulator for Kelvin can be generated using:

bazel build //tests/verilator_sim:core_sim

The verilog source for the Kelvin core can be generated using:

bazel build //hdl/chisel/src/kelvin:core_cc_library_emit_verilog

Verilog source for the Matcha SoC can be generated using:

bazel clean --expunge  # To generate the ToT sha
bazel build //hdl/chisel:matcha_kelvin_verilog