commit | 03723753a137f663e23b86f6a1989098c006964e | [log] [tgz] |
---|---|---|
author | Derek Chow <derekjchow@google.com> | Tue Jul 08 16:03:25 2025 -0700 |
committer | Derek Chow <derekjchow@google.com> | Thu Jul 10 16:23:59 2025 -0700 |
tree | a0f0e5f91f3b24e12480044bb68c67cdbd21ac05 | |
parent | 350a35d5317b0b2b6dabda352f55c8ceca0768cc [diff] |
Add vstart and vxrm to Csr. Change-Id: I4f37b5a8404940dea3893f8c2fad4d93e7fce078
Kelvin is a RISC-V32IM core with a custom instruction set.
More information on the design can be found in the overview.
Kelvin uses bazel as it's build system. The Verilated simulator for Kelvin can be generated using:
bazel build //tests/verilator_sim:core_sim
The verilog source for the Kelvin core can be generated using:
bazel build //hdl/chisel/src/kelvin:core_cc_library_emit_verilog
Verilog source for the Matcha SoC can be generated using:
bazel clean --expunge # To generate the ToT sha bazel build //hdl/chisel:matcha_kelvin_verilog