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opensecura / 3p / lowrisc / opentitan / 6704ad0a8e6df927250f42c73f9fb1c320bf0690 / util / reggen
  1. bd43036 [regtool] Per interface hier_path support by Michael Schaffner · 2 years, 11 months ago
  2. c10cc89 [tock] Autogenerate register definitions for Tock. by Chris Frantz · 3 years ago
  3. 2e3fe6a [mubi/lc_ctrl] Change MUBI / lc_tx_t encodings by Michael Schaffner · 3 years ago
  4. 208d34a [reggen] Add spurious WE check to autogen'd regfile by Michael Schaffner · 3 years ago
  5. 174d484 [bazel] add bazel rules for regtool.py by Timothy Trippel · 3 years ago
  6. 6cca863 [pwrmgr] clarify issues found during pwrmgr v2s review by Timothy Chen · 3 years ago
  7. c832566 [reggen] Move shadow register error aggregation into reg_top by Rupert Swarbrick · 3 years ago
  8. 012e11a [reggen] Factor out some gnarly name generation logic by Rupert Swarbrick · 3 years ago
  9. e5ec3c5 [reggen] Don't generate reg_busy_sel if there are no async regs by Rupert Swarbrick · 3 years ago
  10. e512062 [reggen,doc] Fix rendering of windows with fewer than 5 indices by Rupert Swarbrick · 3 years, 1 month ago
  11. b521ac4 [reggen] If no regs are defined, indicate that explicitly in the docs by Michael Schaffner · 3 years, 1 month ago
  12. 9b93f1b [fpv] Don't import uvm_pkg at global scope by Rupert Swarbrick · 3 years, 1 month ago
  13. 8b48153 [reggen] Make field 'qe' behavior consistent by Timothy Chen · 3 years, 1 month ago
  14. 6a05009 [fpv/csr] Check d_error when addr is OOB by Cindy Chen · 3 years, 1 month ago
  15. ee07d54 [rv_core_ibex,rtl/doc] Add security countermeasures info by Greg Chadwick · 3 years, 2 months ago
  16. d5aefc7 [fpv/csr] Enable checking CSRs with regwen by Cindy Chen · 3 years, 1 month ago
  17. 5cd2863 [reggen] Tweak printing of int unsigned parameters by Rupert Swarbrick · 3 years, 1 month ago
  18. 050b98c [all] variety of minor lint fixes by Timothy Chen · 3 years, 1 month ago
  19. cf549e9 [fpv/pinmux] A few update on pinmux by Cindy Chen · 3 years, 1 month ago
  20. 536092a [fpv/csr] Support rw0c by Cindy Chen · 3 years, 1 month ago
  21. b1b459f [fpv] support read on wr0c reg by Cindy Chen · 3 years, 1 month ago
  22. 0481920 [reggen] Enable field-specific hwqe bits by Alexander Williams · 3 years, 2 months ago
  23. 82b618f [dv] add mubi coverage for CSR and update reggen by Weicai Yang · 3 years, 2 months ago
  24. ec0327f [util] Allow shadowed registers to also be async by Timothy Chen · 3 years, 2 months ago
  25. 8c67c0f [reggen] Add unused_ signal for clk/rst when just one window by Rupert Swarbrick · 3 years, 2 months ago
  26. 5418640 [util] Split unused statement into two lines by Timothy Chen · 3 years, 2 months ago
  27. d8aca09 [util, reggen] Autogen countermeasures testplan by Srikrishna Iyer · 3 years, 2 months ago
  28. 9ac6054 [aes] Add list of countermeasures for D2S sign-off by Pirmin Vogel · 3 years, 3 months ago
  29. 9017a01 [prim] Add phase output to shadow register primitive by Pirmin Vogel · 3 years, 2 months ago
  30. 2b9e1d6 [reg_tool] Remove unused signals for sw wo access by Alexander Williams · 3 years, 2 months ago
  31. 349cc4d [dv/reggen] Fix xcelium hdl backdoor path error by Cindy Chen · 3 years, 2 months ago
  32. 804a3fb [csr fpv autogen] Max addr width = 2 cornercase by Srikrishna Iyer · 3 years, 2 months ago
  33. a40e387 [dv] Fix some Xcelium warnings by Srikrishna Iyer · 3 years, 2 months ago
  34. 78e524a [reggen] Add catch-all and SW_UNWRITABLE/SW_NOACCESS CM labels by Michael Schaffner · 3 years, 2 months ago
  35. 2f0d01f [reggen] Add SIDELOAD CM label by Michael Schaffner · 3 years, 2 months ago
  36. fd557a6 [dv/reggen] Adjust hier_path input for close source OTP tb by Cindy Chen · 3 years, 2 months ago
  37. 1b03901 [util,reggen] Format enum fields in hex by Rupert Swarbrick · 3 years, 2 months ago
  38. 3d326d4 [reggen] Add some more info to warning message by Michael Schaffner · 3 years, 2 months ago
  39. 9af3053 [reggen] Add support for validation of RTL CM annotation by Michael Schaffner · 3 years, 3 months ago
  40. 5124349 [reggen/doc] Update assets and cm_type lists and associated docs by Michael Schaffner · 3 years, 3 months ago
  41. e1cb010 [reggen] Add more countermeasure asset labels by Michael Schaffner · 3 years, 3 months ago
  42. 02bfd84 [reggen] Ensure that countermeasure names are unique by Michael Schaffner · 3 years, 3 months ago
  43. d898fdd [dv] Pass data_intg_passthru to dv_base_mem by Weicai Yang · 3 years, 4 months ago
  44. 70684d8 [reggen] Tweak Register's _asdict to satisfy new mypy by Rupert Swarbrick · 3 years, 3 months ago
  45. 7e70de1 [reggen] Resolve a TODO in the window address decoding logic by Michael Schaffner · 3 years, 4 months ago
  46. d6f6f3e [doc] Automatically generate countermeasure tables in IP docs by Michael Schaffner · 3 years, 4 months ago
  47. 0e47eac [reggen] Headers for non-homogenous multiregs by Drew Macrae · 3 years, 4 months ago
  48. 2dbb0fa [reggen] Don't generate a cmd integrity check if no registers by Rupert Swarbrick · 3 years, 4 months ago
  49. ce3e764 [reggen] Correct indentation for some %if/%for lines by Rupert Swarbrick · 3 years, 4 months ago
  50. 0eb0694 [reggen] Disable ExplicitErrs on tlul_socket_1n modules in reg_tops by Rupert Swarbrick · 3 years, 4 months ago
  51. b492078 [reggen] generate defines of type unsigned ints by Drew Macrae · 3 years, 4 months ago
  52. 4e9df54 [reggen] Add tentative list of assets and cm types by Michael Schaffner · 3 years, 4 months ago
  53. e8976ff [reggen] This adds initial support for a cm list by Michael Schaffner · 3 years, 4 months ago
  54. 9216ea1 [util] Document default resval for non-hwext registers by Rupert Swarbrick · 3 years, 5 months ago
  55. c8389ed [dv/ralgen] Update `dv_base_names` input from a string to a list by Cindy Chen · 3 years, 5 months ago
  56. e16009b [dv/ralgen] Update the `dv-base-prefix` optional input by Cindy Chen · 3 years, 5 months ago
  57. 118ace7 [sw] Add mubi header enums by Timothy Chen · 3 years, 6 months ago
  58. 937d707 [dv] Fix shadow reg backdoor path and enable csr_reset sequence by Weicai Yang · 3 years, 6 months ago
  59. 542c0f5 [reggen] Explicitly cast mubi reset value to an integer by Michael Schaffner · 3 years, 6 months ago
  60. 32c28ca [reggen] Add mubi support into hjson by Timothy Chen · 3 years, 6 months ago
  61. a63edef [reggen] Replace prim_pulse_sync with prim_sync_reqack by Timothy Chen · 3 years, 6 months ago
  62. 1d0a817 [util] clkmgr groups enhancements by Timothy Chen · 3 years, 6 months ago
  63. dd58ae8 [util] Make regwen_multi / compact consistent by Timothy Chen · 3 years, 7 months ago
  64. 3c9a747 [reggen] Add a check to limit the swaccess type for shadow regs by Michael Schaffner · 3 years, 7 months ago
  65. 9eda125 [dv] Fix ral-gen multi-field index by Weicai Yang · 3 years, 7 months ago
  66. 2444ac0 [util] Tidy up how we call finst_gen in reg_top.sv.tpl by Rupert Swarbrick · 3 years, 7 months ago
  67. 71d4b61 [reggen] Ensure that registers are "either RC or not" by Rupert Swarbrick · 3 years, 7 months ago
  68. af9b61c [reggen] Always connect read enable signal to shadow regs by Michael Schaffner · 3 years, 7 months ago
  69. da8885e [sva/keymgr] Fix csr assertion error by Cindy Chen · 3 years, 7 months ago
  70. b146659 [dv] Update RAL-gen to make all mutli-reg to arrays by Weicai Yang · 3 years, 7 months ago
  71. 5d83537 [regfile] Refactor cdc handling to the reg level by Timothy Chen · 3 years, 7 months ago
  72. a038790 regtool: add support to generate reg const as Rust (.rs) by Chia-Chi Teng · 3 years, 8 months ago
  73. e83d30f [rstmgr, top] Add support for shadow resets by Timothy Chen · 3 years, 8 months ago
  74. c473f70 [aes] Use separate subreg prims for fields of shadowed control reg by Pirmin Vogel · 3 years, 8 months ago
  75. 57dc8dc [dv] enhance multi-field in RAL model by Weicai Yang · 3 years, 8 months ago
  76. b6473e2 [reggen] Disallow internal shadow registers from hardware write. by Timothy Chen · 3 years, 8 months ago
  77. 4e7114e [sram_ctrl] Absorb prim_ram_1p_scr by Michael Schaffner · 3 years, 9 months ago
  78. c58548c [reggen] Minor fix to handle internal shadow registers by Timothy Chen · 3 years, 8 months ago
  79. c57e558 [dv] update reg path for async registers by Timothy Chen · 3 years, 8 months ago
  80. a49ceb6 [util, reggen] Support standardized cdc handling for regfile by Timothy Chen · 3 years, 9 months ago
  81. 9ce30ab [prim_subreg] Make software access type an enum by Philipp Wagner · 3 years, 8 months ago
  82. 5aa249f [topgen] Be explicit about where hint clocks get connected by Rupert Swarbrick · 3 years, 8 months ago
  83. 7c3de6e [util] Prep work for shadow reset impelemtation by Timothy Chen · 3 years, 8 months ago
  84. 1a5d53a [alert_handler] Make critical alert handler CSRs shadowed regs by Michael Schaffner · 3 years, 10 months ago
  85. f69b700 [dv] handle multireg with unevenly divided fields by Weicai Yang · 3 years, 9 months ago
  86. 00f6d78 [dv] Use array for multi-reg in RAL model by Weicai Yang · 3 years, 9 months ago
  87. b789cf5 [reggen] Add "REG_RESVAL" defines to generated C headers by Rupert Swarbrick · 3 years, 10 months ago
  88. 02e982f [topgen] Updates for declaring memory regions within IPs by Michael Schaffner · 3 years, 9 months ago
  89. 690d732 [rv_dm] Make the RV_DM a comportable module by Michael Schaffner · 3 years, 9 months ago
  90. d0cbfad [reggen] Pair up clock and reset signals by Rupert Swarbrick · 3 years, 9 months ago
  91. 7cb7f20 [reggen] Generate a single we/re signal per register in reg_top by Rupert Swarbrick · 3 years, 10 months ago
  92. 7252f17 [reggen] Remove swaccess and hwaccess from Register objects by Rupert Swarbrick · 3 years, 10 months ago
  93. bf0909a [reggen,dv] Don't specify rights for add_reg when constructing RAL by Rupert Swarbrick · 3 years, 10 months ago
  94. 7bc9c7d [fpv] Fix template by ayann-snps · 3 years, 10 months ago
  95. 57054be [reggen] Simplify reg_top ports if there's exactly one window by Rupert Swarbrick · 3 years, 10 months ago
  96. 3ec706f [dv/common] update intr_state CSR exclusions by Udi Jonnalagadda · 3 years, 10 months ago
  97. da5ed15 [reggen] Optionally expose register interface in reg2hw signal by Rupert Swarbrick · 3 years, 10 months ago
  98. 49e177c [reggen] Remove hwqe and hwre from Field objects in Python code by Rupert Swarbrick · 3 years, 10 months ago
  99. c5a68c9 [reggen] Slightly refactor code for hwext register fields by Rupert Swarbrick · 3 years, 10 months ago
  100. 359c126 [reggen] Make spacing uniform and simplify comments in reg_top by Rupert Swarbrick · 3 years, 10 months ago