- 91e1b76 [dvsim] Fix coverage dashboard link by Srikrishna Iyer · 4 years, 8 months ago
- 067272a [dv, dvsim] Support multiple fusesoc cores-root by Srikrishna Iyer · 4 years, 8 months ago
- 89308dc [dvsim] Print a more helpful path to coverage dashboard by Rupert Swarbrick · 4 years, 8 months ago
- 4b0d161 [dv] Fix uvmdpi.so path for DSIM by Srikrishna Iyer · 4 years, 9 months ago
- 45fb1c6 [doc] Update Licence Headers to fit agreed style by Sam Elliott · 4 years, 10 months ago
- 37324a7 [tool/script] delete clean section in make files by Cindy Chen · 4 years, 9 months ago
- 6dd66a0 Define XCELIUM when running dvsim with Xcelium by Philipp Wagner · 4 years, 9 months ago
- 61747d1 Modified some command-line arguments for DSim by Aimee Sutton · 4 years, 10 months ago
- eb0568c [util] Adding DSim vpi/dpi include path. by Slava Litvinov · 4 years, 10 months ago
- 0408a4e [dv] csr backdoor support by Weicai Yang · 4 years, 10 months ago
- 299cae5 [dvsim] Tidy up wave dumping logic by Rupert Swarbrick · 5 years ago
- adce310 [flash_ctrl] Update RTL to support different data and bus width by Timothy Chen · 5 years ago
- ee7304b [dv] Add support for running tests with Riviera-PRO by Dawid Zimonczyk · 4 years, 11 months ago
- 37c9127 [dvsim] Update Xcelium cfg to use CDNS UVM by Srikrishna Iyer · 4 years, 10 months ago
- bf4f77e [dv] Cleanup Xcelium warning: XProp related by Srikrishna Iyer · 4 years, 10 months ago
- 9b340db [chip dv] Support for running opentitan tock in dv by Srikrishna Iyer · 4 years, 11 months ago
- 8dedfb5 [dvsim] Simulation mode for 0-delay loop detection by Srikrishna Iyer · 4 years, 10 months ago
- f55d8ea [dv] Add `-xlrm uniq_prior_final` Swtich to VCS by Srikrishna Iyer · 4 years, 11 months ago
- c612bb0 [dvsim] Support for running pre-built SW tests by Srikrishna Iyer · 4 years, 11 months ago
- a620e75 [dv] R-enable assert-final checks in chip DV by Srikrishna Iyer · 5 years ago
- 3782fb0 [util] Adding DSim simulator configuration. by SlavaL · 5 years ago
- 866fc2d [chip dv] Update coverage cfg file by Srikrishna Iyer · 5 years ago
- bc6aabd [chip dv] Enable parallel meson invocation by Srikrishna Iyer · 5 years ago
- 3fc2ce4 [dv] Fix failures in test csr_mem_rw_with_rand_reset by Weicai Yang · 5 years ago
- 3c8553d [dv] Add test csr_mem_rw_with_rand_reset by Weicai Yang · 5 years ago
- 1287104 [sw] Generate 32-bit and 64-bit .vmem by Greg Chadwick · 5 years ago
- 752f06d [dv] Update xcelium option to fix compile error by Weicai Yang · 5 years ago
- e24da1c [sw] Make non-DV logging consistent with DV logging by Miguel Young de la Sota · 5 years ago
- 5723552 [dv, sw] "Backdoor" C->SV logging by Srikrishna Iyer · 5 years ago
- 9ebdeb4 [dv] Fix unmapped test and add partial mem write support by Weicai Yang · 5 years ago
- 77436c3 [dv] Re-org tl_seq_lib by Weicai Yang · 5 years ago
- 39ffebd [dvsim] Enable coverage collection with Xcelium by Srikrishna Iyer · 5 years ago
- cf42ab6 [dv] Add partial mem read with non-blocking access by Weicai Yang · 5 years ago
- c4e3203 [dvsim] Added fusesoc generator for RAL by Srikrishna Iyer · 5 years ago
- 31029d2 [dvsim] Update return error message by Weicai Yang · 5 years ago
- 502ec90 [dvsim] Add vpd wave dumping support by Greg Chadwick · 5 years ago
- 148751b [dvsim] Add licqueue swtich for Xcelium by Srikrishna Iyer · 5 years ago
- 90eac34 [dv/common] Fix reset and under_reset order for nightly by Cindy Chen · 5 years ago
- 97fe0d8 [dv, sw] UART logs to UVM prints by Srikrishna Iyer · 5 years ago
- 5c3eb57 [cleanup] This cleans up header comments in makefiles by Michael Schaffner · 5 years ago
- 8ac6c4c [lint/dvsim] This adds a lint flow to dvsim by Michael Schaffner · 5 years ago
- 42d032f [top_earlgrey dv] Enabled DV with dvsim by Srikrishna Iyer · 5 years ago
- 3195ae3 [dv/uart] make nightly coverage 100% by Weicai Yang · 5 years ago
- 86f6bce [dvsim tool] "use_cfgs" usecase enhancement by Srikrishna Iyer · 5 years ago
- 680f7e2 [dvsim] Update dvsim to run with designated simulator by Weicai Yang · 5 years ago
- c15f33a [rtl, dv] Fix top_earlgrey_asic, dv updates by Srikrishna Iyer · 5 years ago
- cb346df [dv regr tool] Coverage collection across branches by Srikrishna Iyer · 5 years ago
- 2a710a4 [dv regr tool] Coverage collection and reporting by Srikrishna Iyer · 5 years ago
- 9a3add5 [uart/dv] Update uart interrupt by Weicai Yang · 5 years ago
- 8ce80d0 [dv regr tool] Updates to support LSF by Srikrishna Iyer · 5 years ago
- ebcabe2 [dv] Updates to enable CI setup by Srikrishna Iyer · 5 years ago
- f578e7c [dv regr tool] Publish results in html + fixes by Srikrishna Iyer · 5 years ago
- 6b02a01 [dv] fusesoc with export + Chip sims with dvsim by Srikrishna Iyer · 5 years ago
- 4f0b090 [dv regr tool] Publish results to OT web server by Srikrishna Iyer · 5 years ago
- 13173e8 [aes dv] Enabled AES DV with dvsim regr tool by Srikrishna Iyer · 5 years ago
- 228f1c1 [dv regr tool] Possible fixes for crash / freeze by Srikrishna Iyer · 5 years ago
- 3529221 [dv regr tool] Added 'overrides' directive by Srikrishna Iyer · 5 years ago
- 091526f [dvsim] Add sim_cfg.hjson files for all supported IPs by Udi Jonnalagadda · 5 years ago
- 544da8d [dv regr tool] Support for multi IP sim runs by Srikrishna Iyer · 5 years ago
- 941227d [dv/common] outstanding access by Cindy Chen · 5 years ago
- ee57d1a [dv] Support Xcelium and xprop in new dv regression flow by Weicai Yang · 5 years ago
- e19f42b [dv] Port HMAC to use dvsim regr tool by Srikrishna Iyer · 5 years ago
- 7cf7cad [dv regr tool] Generate testplan annotated results by Srikrishna Iyer · 5 years ago
- 09a81e9 [dv] Tool for running regressions by Srikrishna Iyer · 5 years ago
