| lowRISC Contributors | 802543a | 2019-08-31 12:12:56 +0100 | [diff] [blame] | 1 | # Introduction to OpenTitan |
| 2 | |
| 3 | The OpenTitan project aims to design and ship an open source, industry-leading piece of secure silicon for Root of Trust applications. |
| 4 | OpenTitan is administered by lowRISC CIC as a collaborative |
| 5 | [project](doc/project.md) |
| 6 | to produce high quality, open IP for instantiation as a full-featured |
| 7 | [product](doc/product.md). |
| 8 | This repository exists to enable collaboration across partners participating in the OpenTitan project. |
| 9 | |
| 10 | To get started using or contributing to the OpenTitan codebase, see the |
| 11 | [list of user guides](doc/ug/index.md). |
| 12 | For details on coding styles or how to use our project-specific tooling, see the |
| 13 | [reference manuals](doc/rm/index.md). |
| 14 | [This page](hw/index.md) |
| 15 | contains technical documentation on the SoC, the Ibex processor core, and the individual IP blocks. |
| 16 | |
| 17 | While the repository is currently private and the work embargoed at these early stages, it will eventually be released publicly. |
| 18 | |
| 19 | ## Repository Structure |
| 20 | |
| 21 | The underlying |
| 22 | [repo](http://www.github.com/lowrisc/opentitan) |
| 23 | is set up as a monolithic repository to contain RTL, helper scripts, technical documentation, and other software necessary to produce our hardware designs. |
| 24 | |
| 25 | See also [repository readme](README.mkd) for licensing information and the development methodology. |
| 26 | |
| 27 | ## Documentation Sections |
| 28 | |
| 29 | * [Project](doc/project.md) |
| 30 | * How the OpenTitan project is organized |
| 31 | * Governance of the program, how to get involved |
| 32 | * Progress tracking |
| 33 | * [Product](doc/product.md) |
| 34 | * What is the OpenTitan product |
| 35 | * Architecture and technical hardware specifications |
| 36 | * Software roadmap |
| 37 | * Security and manufacturing |
| 38 | * [User Guides](doc/ug/index.md) |
| 39 | * How to get started with the repo |
| 40 | * How to emulate on an FPGA |
| 41 | * How verification is done in OpenTitan |
| 42 | * How validation is done on FPGA in the project |
| 43 | * [Reference Manuals](doc/rm/index.md) |
| 44 | * Defining comportable IP peripherals |
| 45 | * Coding style guides for Verilog, Python, and Markdown |
| 46 | * OpenTitan tools |
| 47 | * Working with vendor tools |
| 48 | * [Hardware Specifications](hw/index.md) |
| 49 | * Top-level SoC |
| 50 | * Ibex processor core |
| 51 | * Comportable IP blocks |
| 52 | * [Tools](util/index.md) |
| 53 | * Readme's of OpenTitan tools |
| 54 | |
| 55 | If you're not finding what you're looking for, check the [sitemap](sitemap.md). |
