| Srikrishna Iyer | ebcabe2 | 2020-01-31 12:50:02 -0800 | [diff] [blame] | 1 | // Copyright lowRISC contributors. |
| 2 | // Licensed under the Apache License, Version 2.0, see LICENSE for details. |
| 3 | // SPDX-License-Identifier: Apache-2.0 |
| 4 | { |
| Scott Johnson | fe79c4b | 2020-07-08 10:31:08 -0700 | [diff] [blame] | 5 | // This is a cfg hjson group for DV simulations. It includes ALL individual DV simulation |
| Srikrishna Iyer | ebcabe2 | 2020-01-31 12:50:02 -0800 | [diff] [blame] | 6 | // cfgs of the IPs and the full chip used in top_earlgrey. This enables the common |
| 7 | // regression sets to be run in one shot. |
| Michael Schaffner | 8ac6c4c | 2020-03-03 15:00:20 -0800 | [diff] [blame] | 8 | name: top_earlgrey_batch_sim |
| Srikrishna Iyer | 86f6bce | 2020-02-27 19:02:04 -0800 | [diff] [blame] | 9 | |
| 10 | import_cfgs: [// Project wide common cfg file |
| 11 | "{proj_root}/hw/data/common_project_cfg.hjson"] |
| 12 | |
| Rupert Swarbrick | a23dfec | 2020-09-07 10:01:28 +0100 | [diff] [blame] | 13 | flow: sim |
| 14 | |
| Srikrishna Iyer | 64b6d9b | 2021-02-10 22:02:47 -0800 | [diff] [blame] | 15 | // Maintain alphabetical order below. |
| 16 | use_cfgs: [// IPs. |
| 17 | "{proj_root}/hw/ip/aes/dv/aes_sim_cfg.hjson", |
| Steve Nelson | 8cc9fc6 | 2020-12-08 08:00:45 -0800 | [diff] [blame] | 18 | "{proj_root}/hw/ip/csrng/dv/csrng_sim_cfg.hjson", |
| Srikrishna Iyer | 64b6d9b | 2021-02-10 22:02:47 -0800 | [diff] [blame] | 19 | "{proj_root}/hw/ip/entropy_src/dv/entropy_src_sim_cfg.hjson", |
| Srikrishna Iyer | 10013f4 | 2020-06-29 15:57:33 -0700 | [diff] [blame] | 20 | "{proj_root}/hw/ip/flash_ctrl/dv/flash_ctrl_sim_cfg.hjson", |
| Srikrishna Iyer | ebcabe2 | 2020-01-31 12:50:02 -0800 | [diff] [blame] | 21 | "{proj_root}/hw/ip/gpio/dv/gpio_sim_cfg.hjson", |
| 22 | "{proj_root}/hw/ip/hmac/dv/hmac_sim_cfg.hjson", |
| Srikrishna Iyer | 3e9d888 | 2020-03-05 00:48:42 -0800 | [diff] [blame] | 23 | "{proj_root}/hw/ip/i2c/dv/i2c_sim_cfg.hjson", |
| Weicai Yang | c30d3df | 2020-09-23 15:59:51 -0700 | [diff] [blame] | 24 | "{proj_root}/hw/ip/keymgr/dv/keymgr_sim_cfg.hjson", |
| Udi Jonnalagadda | 21b529e | 2020-11-30 17:18:32 -0800 | [diff] [blame] | 25 | "{proj_root}/hw/ip/kmac/dv/kmac_masked_sim_cfg.hjson", |
| 26 | "{proj_root}/hw/ip/kmac/dv/kmac_unmasked_sim_cfg.hjson", |
| Cindy Chen | a83a5dd | 2020-12-08 13:37:37 -0800 | [diff] [blame] | 27 | "{proj_root}/hw/ip/lc_ctrl/dv/lc_ctrl_sim_cfg.hjson", |
| Rupert Swarbrick | 63d58f4 | 2020-12-07 16:52:07 +0000 | [diff] [blame] | 28 | "{proj_root}/hw/ip/otbn/dv/uvm/otbn_sim_cfg.hjson", |
| Srikrishna Iyer | 64b6d9b | 2021-02-10 22:02:47 -0800 | [diff] [blame] | 29 | "{proj_root}/hw/ip/otp_ctrl/dv/otp_ctrl_sim_cfg.hjson", |
| 30 | "{proj_root}/hw/ip/pattgen/dv/pattgen_sim_cfg.hjson", |
| 31 | "{proj_root}/hw/ip/prim/dv/prim_lfsr/prim_lfsr_sim_cfg.hjson", |
| 32 | "{proj_root}/hw/ip/prim/dv/prim_present/prim_present_sim_cfg.hjson", |
| 33 | "{proj_root}/hw/ip/prim/dv/prim_prince/prim_prince_sim_cfg.hjson", |
| Srikrishna Iyer | ebcabe2 | 2020-01-31 12:50:02 -0800 | [diff] [blame] | 34 | "{proj_root}/hw/ip/rv_timer/dv/rv_timer_sim_cfg.hjson", |
| 35 | "{proj_root}/hw/ip/spi_device/dv/spi_device_sim_cfg.hjson", |
| Udi Jonnalagadda | a825238 | 2021-02-05 11:32:34 -0800 | [diff] [blame^] | 36 | "{proj_root}/hw/ip/sram_ctrl/dv/sram_ctrl_main_sim_cfg.hjson", |
| 37 | "{proj_root}/hw/ip/sram_ctrl/dv/sram_ctrl_ret_sim_cfg.hjson", |
| Srikrishna Iyer | ebcabe2 | 2020-01-31 12:50:02 -0800 | [diff] [blame] | 38 | "{proj_root}/hw/ip/uart/dv/uart_sim_cfg.hjson", |
| Weicai Yang | d401c8f | 2020-02-07 18:07:43 -0800 | [diff] [blame] | 39 | "{proj_root}/hw/ip/usbdev/dv/usbdev_sim_cfg.hjson", |
| Srikrishna Iyer | 64b6d9b | 2021-02-10 22:02:47 -0800 | [diff] [blame] | 40 | // Top level IPs. |
| Cindy Chen | 6ecc55a | 2020-06-23 17:31:48 -0700 | [diff] [blame] | 41 | "{proj_root}/hw/top_earlgrey/ip/alert_handler/dv/alert_handler_sim_cfg.hjson", |
| Weicai Yang | d401c8f | 2020-02-07 18:07:43 -0800 | [diff] [blame] | 42 | "{proj_root}/hw/top_earlgrey/ip/xbar_main/dv/autogen/xbar_main_sim_cfg.hjson", |
| Srikrishna Iyer | 42d032f | 2020-03-04 23:55:44 -0800 | [diff] [blame] | 43 | "{proj_root}/hw/top_earlgrey/ip/xbar_peri/dv/autogen/xbar_peri_sim_cfg.hjson", |
| Srikrishna Iyer | 64b6d9b | 2021-02-10 22:02:47 -0800 | [diff] [blame] | 44 | // Top level. |
| Srikrishna Iyer | 42d032f | 2020-03-04 23:55:44 -0800 | [diff] [blame] | 45 | "{proj_root}/hw/top_earlgrey/dv/chip_sim_cfg.hjson"] |
| Srikrishna Iyer | ebcabe2 | 2020-01-31 12:50:02 -0800 | [diff] [blame] | 46 | } |
