blob: 10e05e962dfbd0512e9d9ed42c9da7b145a893bc [file] [log] [blame]
Sam Elliottcd8b1e02020-05-11 22:12:33 +01001From d41fc018e9018a44f6a70e52e4f9d4398b4e4659 Mon Sep 17 00:00:00 2001
2From: Sam Elliott <selliott@lowrisc.org>
3Date: Mon, 11 May 2020 21:27:04 +0100
4Subject: [PATCH 7/7] Add Include Path For OpenTitan Linker Script
5
6---
7 riscv-target/opentitan/device/rv32imc/Makefile.include | 3 ++-
8 1 file changed, 2 insertions(+), 1 deletion(-)
9
10diff --git a/riscv-target/opentitan/device/rv32imc/Makefile.include b/riscv-target/opentitan/device/rv32imc/Makefile.include
11index 41e410b..61dd819 100644
12--- a/riscv-target/opentitan/device/rv32imc/Makefile.include
13+++ b/riscv-target/opentitan/device/rv32imc/Makefile.include
14@@ -64,7 +64,8 @@ COMPILE_TARGET += \
15 -I$(OT_ROOT) \
16 -I$(TARGETDIR)/$(RISCV_TARGET)/ \
17 -I$(TARGETDIR)/$(RISCV_TARGET)/ \
18- $(DEFINES) -T$(LDSCRIPT) $$< \
19+ $(DEFINES) \
20+ -L$(OT_ROOT) -T$(LDSCRIPT) $$< \
21 $(OPENTITAN)/main.c \
22 $(OPENTITAN)/run_rvc_test.S \
23 $(OT_ROOT)/sw/device/exts/common/ibex_interrupt_vectors.S \
24--
252.26.0
26