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Michael Schaffnere81ab752020-09-30 18:57:29 -07001// Copyright lowRISC contributors.
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4//
5
6package lc_ctrl_pkg;
7
Michael Schaffner9a621db2020-11-18 22:53:05 -08008 import prim_util_pkg::vbits;
Michael Schaffner26588202020-12-29 16:31:58 -08009 import lc_ctrl_state_pkg::*;
Michael Schaffner9a621db2020-11-18 22:53:05 -080010
Michael Schaffner9a621db2020-11-18 22:53:05 -080011 ///////////////////////////////////////
12 // Netlist Constants (Hashed Tokens) //
13 ///////////////////////////////////////
14
15 parameter int NumTokens = 6;
16 parameter int TokenIdxWidth = vbits(NumTokens);
17 typedef enum logic [TokenIdxWidth-1:0] {
18 // This is the index for the hashed all-zero constant.
19 // All unconditional transitions use this token.
20 ZeroTokenIdx = 3'h0,
21 RawUnlockTokenIdx = 3'h1,
22 TestUnlockTokenIdx = 3'h2,
23 TestExitTokenIdx = 3'h3,
24 RmaTokenIdx = 3'h4,
25 // This is the index for an all-zero value (i.e., hashed value = '0).
26 // This is used as an additional blocker for some invalid state transition edges.
27 InvalidTokenIdx = 3'h5
28 } token_idx_e;
29
Michael Schaffnere81ab752020-09-30 18:57:29 -070030 ////////////////////////////////
31 // Typedefs for LC Interfaces //
32 ////////////////////////////////
33
Michael Schaffner798906d2020-10-07 19:57:59 -070034 parameter int TxWidth = 4;
Michael Schaffnerac567602021-04-14 19:04:25 -070035
36 typedef enum logic [TxWidth-1:0] {
Michael Schaffner798906d2020-10-07 19:57:59 -070037 On = 4'b1010,
38 Off = 4'b0101
Weicai Yangee8c4bf2021-11-17 11:51:18 -080039 } lc_tx_t;
Michael Schaffnerac567602021-04-14 19:04:25 -070040 parameter lc_tx_t LC_TX_DEFAULT = lc_tx_t'(Off);
Michael Schaffnere81ab752020-09-30 18:57:29 -070041
Michael Schaffner9a621db2020-11-18 22:53:05 -080042 parameter int RmaSeedWidth = 32;
43 typedef logic [RmaSeedWidth-1:0] lc_flash_rma_seed_t;
Pirmin Vogelbdc46562021-09-17 17:16:55 +020044 parameter lc_flash_rma_seed_t LC_FLASH_RMA_SEED_DEFAULT = '0;
Michael Schaffner9a621db2020-11-18 22:53:05 -080045
Michael Schaffner075b2632021-04-05 15:34:13 -070046 parameter int LcKeymgrDivWidth = 128;
Michael Schaffner4d44e102020-12-07 12:08:59 -080047 typedef logic [LcKeymgrDivWidth-1:0] lc_keymgr_div_t;
48
Michael Schaffner9a621db2020-11-18 22:53:05 -080049 ////////////////////
50 // Main FSM State //
51 ////////////////////
52
53 // Encoding generated with:
Michael Schaffner0c6bac82021-07-13 18:13:33 -070054 // $ ./util/design/sparse-fsm-encode.py -d 5 -m 15 -n 16 \
Michael Schaffner9a621db2020-11-18 22:53:05 -080055 // -s 2934212379 --language=sv
56 //
57 // Hamming distance histogram:
58 //
59 // 0: --
60 // 1: --
61 // 2: --
62 // 3: --
63 // 4: --
Michael Schaffner0c6bac82021-07-13 18:13:33 -070064 // 5: ||||||| (7.62%)
Michael Schaffner7dc80dd2021-12-01 20:46:47 -080065 // 6: ||||||||| (9.52%)
66 // 7: |||||||||||||||| (17.14%)
67 // 8: |||||||||||||||||||| (20.95%)
68 // 9: ||||||||||||||||| (18.10%)
69 // 10: ||||||||||||| (14.29%)
Michael Schaffner0c6bac82021-07-13 18:13:33 -070070 // 11: |||||| (6.67%)
71 // 12: ||| (3.81%)
Michael Schaffner7dc80dd2021-12-01 20:46:47 -080072 // 13: | (1.90%)
Michael Schaffner9a621db2020-11-18 22:53:05 -080073 // 14: --
74 // 15: --
75 // 16: --
76 //
77 // Minimum Hamming distance: 5
78 // Maximum Hamming distance: 13
Michael Schaffner0c6bac82021-07-13 18:13:33 -070079 // Minimum Hamming weight: 3
80 // Maximum Hamming weight: 11
Michael Schaffner9a621db2020-11-18 22:53:05 -080081 //
82 localparam int FsmStateWidth = 16;
83 typedef enum logic [FsmStateWidth-1:0] {
Michael Schaffner7dc80dd2021-12-01 20:46:47 -080084 ResetSt = 16'b1111011010111100,
85 IdleSt = 16'b0000011110101101,
86 ClkMuxSt = 16'b1100111011001001,
87 CntIncrSt = 16'b0011001111000111,
88 CntProgSt = 16'b0000110001010100,
89 TransCheckSt = 16'b0110111010110000,
90 TokenHashSt = 16'b1101001000111111,
Michael Schaffner0c6bac82021-07-13 18:13:33 -070091 FlashRmaSt = 16'b1110100010001111,
Michael Schaffner9a621db2020-11-18 22:53:05 -080092 TokenCheck0St = 16'b0010000011000000,
93 TokenCheck1St = 16'b1101010101101111,
94 TransProgSt = 16'b1000000110101011,
95 PostTransSt = 16'b0110110100101100,
Michael Schaffner0c6bac82021-07-13 18:13:33 -070096 ScrapSt = 16'b1010100001010001,
97 EscalateSt = 16'b1011110110011011,
98 InvalidSt = 16'b0011000101001100
Michael Schaffner9a621db2020-11-18 22:53:05 -080099 } fsm_state_e;
100
101 ///////////////////////////////////////////
102 // Manufacturing State Transition Matrix //
103 ///////////////////////////////////////////
104
Michael Schaffnerbc95f342021-07-15 17:50:43 -0700105 // Helper macro to assemble the token index matrix below.
106 // From TEST_UNLOCKED(N)
107 // -> SCRAP, RMA
108 // -> PROD, PROD_END, DEV
109 // -> TEST_UNLOCKED(N+1)-7
110 // -> TEST_LOCKED(N)-6
111 // -> TEST_UNLOCKED0-(N), RAW
112 `define TEST_UNLOCKED(idx) \
113 {2{ZeroTokenIdx}}, \
114 {3{TestExitTokenIdx}}, \
115 {(7-idx){InvalidTokenIdx, \
116 ZeroTokenIdx}}, \
117 {(2*idx+2){InvalidTokenIdx}}
118
119 // Helper macro to assemble the token index matrix below.
120 // From TEST_LOCKED(N)
121 // -> SCRAP
122 // -> RMA
123 // -> PROD, PROD_END, DEV
124 // -> TEST_UNLOCKED(N+1)-7
125 // -> TEST_LOCKED(N)-6
126 // -> TEST_UNLOCKED0-(N), RAW
127 `define TEST_LOCKED(idx) \
128 ZeroTokenIdx, \
129 InvalidTokenIdx, \
130 {3{TestExitTokenIdx}}, \
131 {(7-idx){TestUnlockTokenIdx, \
132 InvalidTokenIdx}}, \
133 {(2*idx+2){InvalidTokenIdx}}
134
Michael Schaffner9a621db2020-11-18 22:53:05 -0800135 // The token index matrix below encodes 1) which transition edges are valid and 2) which token
136 // to use for a given transition edge. Note that unconditional but otherwise valid transitions
137 // are assigned the ZeroTokenIdx, whereas invalid transitions are assigned an InvalidTokenIdx.
138 parameter token_idx_e [NumLcStates-1:0][NumLcStates-1:0] TransTokenIdxMatrix = {
139 // SCRAP
Michael Schaffnerbc95f342021-07-15 17:50:43 -0700140 {21{InvalidTokenIdx}}, // -> TEST_LOCKED0-6, TEST_UNLOCKED0-7, DEV, PROD, PROD_END, RMA, SCRAP
Michael Schaffner9a621db2020-11-18 22:53:05 -0800141 // RMA
142 ZeroTokenIdx, // -> SCRAP
Michael Schaffnerbc95f342021-07-15 17:50:43 -0700143 {20{InvalidTokenIdx}}, // -> TEST_LOCKED0-6, TEST_UNLOCKED0-7, DEV, PROD, PROD_END, RMA
Michael Schaffner9a621db2020-11-18 22:53:05 -0800144 // PROD_END
145 ZeroTokenIdx, // -> SCRAP
Michael Schaffnerbc95f342021-07-15 17:50:43 -0700146 {20{InvalidTokenIdx}}, // -> TEST_LOCKED0-6, TEST_UNLOCKED0-7, DEV, PROD, PROD_END, RMA
Michael Schaffner9a621db2020-11-18 22:53:05 -0800147 // PROD
148 ZeroTokenIdx, // -> SCRAP
149 RmaTokenIdx, // -> RMA
Michael Schaffnerbc95f342021-07-15 17:50:43 -0700150 {19{InvalidTokenIdx}}, // -> TEST_LOCKED0-6, TEST_UNLOCKED0-7, DEV, PROD, PROD_END
Michael Schaffner9a621db2020-11-18 22:53:05 -0800151 // DEV
152 ZeroTokenIdx, // -> SCRAP
153 RmaTokenIdx, // -> RMA
Michael Schaffnerbc95f342021-07-15 17:50:43 -0700154 {19{InvalidTokenIdx}}, // -> TEST_LOCKED0-6, TEST_UNLOCKED0-7, DEV, PROD, PROD_END
155 // TEST_UNLOCKED0-7, TEST_LOCKED0-6
156 `TEST_UNLOCKED(7),
157 `TEST_LOCKED(6),
158 `TEST_UNLOCKED(6),
159 `TEST_LOCKED(5),
160 `TEST_UNLOCKED(5),
161 `TEST_LOCKED(4),
162 `TEST_UNLOCKED(4),
163 `TEST_LOCKED(3),
164 `TEST_UNLOCKED(3),
165 `TEST_LOCKED(2),
166 `TEST_UNLOCKED(2),
167 `TEST_LOCKED(1),
168 `TEST_UNLOCKED(1),
169 `TEST_LOCKED(0),
170 `TEST_UNLOCKED(0),
Michael Schaffner9a621db2020-11-18 22:53:05 -0800171 // RAW
172 ZeroTokenIdx, // -> SCRAP
173 {4{InvalidTokenIdx}}, // -> RMA, PROD, PROD_END, DEV
Michael Schaffnerbc95f342021-07-15 17:50:43 -0700174 {8{RawUnlockTokenIdx, // -> TEST_UNLOCKED0-7
175 InvalidTokenIdx}} // -> RAW, TEST_LOCKED0-6
Michael Schaffner9a621db2020-11-18 22:53:05 -0800176 };
177
Michael Schaffnere81ab752020-09-30 18:57:29 -0700178endpackage : lc_ctrl_pkg