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Garret Kelly9eebde02019-10-22 15:36:49 -04001---
2title: "Quickstart"
3---
4
lowRISC Contributors802543a2019-08-31 12:12:56 +01005# Quickstart
6
Greg Chadwick7c2b7072019-11-01 14:41:13 +00007## Extract the release
8
9Download a release bitstream from the [OpenTitan Github Releases page](https://github.com/lowRISC/opentitan/releases) and extract it.
10`$OT_TOP` refers to the location where it is extracted.
11
12```console
13$ mkdir -p $OT_TOP
14$ tar -C $OT_TOP -xvf opentitan-snapshot-20191101-1.tar.xz --strip-components=1
15```
16
17(Replace opentitan-snapshot-20191101-1.tar.xz with the release you downloaded if you have downloaded a different version)
lowRISC Contributors802543a2019-08-31 12:12:56 +010018
19## Simulation with Verilator
20
Greg Chadwick7c2b7072019-11-01 14:41:13 +000021Run the provided simulator binary with
22```console
23$ cd $OT_TOP
24$ ./hw/top_earlgrey/Vtop_earlgrey_verilator --rominit=./sw/device/sim/boot_rom/rom.vmem --flashinit=./sw/device/sim/examples/hello_world/sw.vmem
lowRISC Contributors802543a2019-08-31 12:12:56 +010025
Greg Chadwick7c2b7072019-11-01 14:41:13 +000026Simulation of OpenTitan Earl Grey
27=================================
28
29Tracing can be toggled by sending SIGUSR1 to this process:
30$ kill -USR1 19351
31
32Rom initialized with program at ./sw/device/sim/boot_rom/rom.vmem
33
34Flash initialized with program at ./sw/device/sim/examples/hello_world/sw.vmem
35
36GPIO: FIFO pipe created at /home/greg/work/opentitan_builds/ot/gpio0 for 32 bit wide GPIO. Run
37$ cat /home/greg/work/opentitan_builds/ot/gpio0
38to observe the output.
39
40JTAG: Virtual JTAG interface jtag0 is listening on port 44853. Use
41OpenOCD and the following configuration to connect:
42 interface remote_bitbang
43 remote_bitbang_host localhost
44 remote_bitbang_port 44853
45
46SPI: Created /dev/pts/4 for spi0. Connect to it with any terminal program, e.g.
47$ screen /dev/pts/4
48NOTE: a SPI transaction is run for every 4 characters entered.
49SPI: Monitor output file created at /home/greg/work/opentitan_builds/ot/spi0.log. Works well with tail:
50$ tail -f /home/greg/work/opentitan_builds/ot/spi0.log
51
52UART: Created /dev/pts/6 for uart0. Connect to it with any terminal program, e.g.
53$ screen /dev/pts/6
54
55Simulation running, end by pressing CTRL-c.
56TOP.top_earlgrey_verilator.top_earlgrey.core.ibex_tracer_i: Writing execution trace to trace_core_00000000.log
57```
58
59Note the UART output will be available on `/dev/pts/N`, `/dev/pts/6` in this example.
60Use `cat` to view the UART output to see everything that has been output since simulation start.
lowRISC Contributors802543a2019-08-31 12:12:56 +010061
62```console
Greg Chadwick7c2b7072019-11-01 14:41:13 +000063$ cat /dev/pts/6
64Commit ID: 1d0d927693c2ef60d7880ab306beb25115a53dcb
65Build Date: 2019-11-01, 15:57:42
66Jump!
67Hello World! Nov 1 2019 15:57:49
68Watch the LEDs!
69Try out the switches on the board
70or type anything into the console window.
71The LEDs show the ASCII code of the last character.
lowRISC Contributors802543a2019-08-31 12:12:56 +010072```
73
Garret Kelly9eebde02019-10-22 15:36:49 -040074See the [Getting Started with Verilator Guide]({{< relref "getting_started_verilator.md" >}}) for more information.
lowRISC Contributors802543a2019-08-31 12:12:56 +010075
76## Running on an FPGA
77
Philipp Wagnerbe2293d2019-10-24 17:21:27 +010078Do you want to try out the design without installing EDA tools and waiting for a long build?
79Then you have come to the right place!
lowRISC Contributors802543a2019-08-31 12:12:56 +010080
Philipp Wagnerbe2293d2019-10-24 17:21:27 +010081You need the following things:
lowRISC Contributors802543a2019-08-31 12:12:56 +010082
Philipp Wagnerbe2293d2019-10-24 17:21:27 +010083* A [Nexys Video FPGA board](https://store.digilentinc.com/nexys-video-artix-7-fpga-trainer-board-for-multimedia-applications/)
84 (Unfortunately we do not provide presynthesized bitstreams for other FPGA boards right now.)
Ohad Russoe76fadc2019-10-29 12:34:21 -070085* An empty USB pen drive or microSD card (at least 16 MB)
86* `fdisk` utility installed on your machine.
87 ```
88 sudo apt-get install fdisk
89 ```
lowRISC Contributors802543a2019-08-31 12:12:56 +010090
Philipp Wagnerbe2293d2019-10-24 17:21:27 +010091Once you have obtained these things, follow these steps to get started.
92
Ohad Russoe76fadc2019-10-29 12:34:21 -070093### Prepare a storage device with the FPGA bitstream
Philipp Wagnerbe2293d2019-10-24 17:21:27 +010094
Ohad Russoe76fadc2019-10-29 12:34:21 -070095**Note**: you may need to be an admin on your machine in order to mount and format external storage devices.
96If you are, and some of the commands run into permission errors, run them in `sudo` mode.
97
Greg Chadwick7c2b7072019-11-01 14:41:13 +0000981. Insert microSD/USB pen to your machine.
992. Run `fdisk -l` to find where the device was mapped.
Ohad Russoe76fadc2019-10-29 12:34:21 -0700100 See an example mapping below, where an SD device was mapped as */dev/mmcblk0p1*.
101
102 ```
103 $ fdisk -l
104 ...
105 Disk /dev/mmcblk0: 14.9 GiB, 15931539456 bytes, 31116288 sectors
106 Units: sectors of 1 * 512 = 512 bytes
107 Sector size (logical/physical): 512 bytes / 512 bytes
108 I/O size (minimum/optimal): 512 bytes / 512 bytes
109 Disklabel type: dos
110 Disk identifier: 0x00000000
111
112 Device Boot Start End Sectors Size Id Type
113 /dev/mmcblk0p1 8192 31116287 31108096 14.9G c W95 FAT32 (LBA)
114 ```
115
Greg Chadwick7c2b7072019-11-01 14:41:13 +00001163. Format the device to *FAT32* format.
Ohad Russoe76fadc2019-10-29 12:34:21 -0700117 ```bash
118 mkfs.fat -F 32 /dev/mmcblk0p1
119 ```
120
Greg Chadwick7c2b7072019-11-01 14:41:13 +00001214. Mount the device by running the following commands:
Ohad Russoe76fadc2019-10-29 12:34:21 -0700122
123 ```bash
124 mkdir -p ~/ot-img-mount # Can be a different name
125 mount -t vfat /dev/mmcblk0p1 ~/ot-img-mount # Change according to mount/dev
126 ```
127
Greg Chadwick7c2b7072019-11-01 14:41:13 +00001285. Make sure the device is empty. `ls ~/ot-img-mount` should not print anything.
1296. Copy the bit file image to the storage device.
Ohad Russoe76fadc2019-10-29 12:34:21 -0700130 ```bash
Greg Chadwick7c2b7072019-11-01 14:41:13 +0000131 cd $OT_TOP
Ohad Russoe76fadc2019-10-29 12:34:21 -0700132 cp hw/top_earlgrey/lowrisc_systems_top_earlgrey_nexysvideo_0.1.bit ~/ot-img-mount/
133 ```
134
Greg Chadwick7c2b7072019-11-01 14:41:13 +0000135For more information on programming the Nexsys Video FPGA board refer to Section 2.3 of [Nexys Video reference manual](https://reference.digilentinc.com/_media/reference/programmable-logic/nexys-video/nexysvideo_rm.pdf).
136
Ohad Russoe76fadc2019-10-29 12:34:21 -0700137### Program the FPGA with a bitstream from the storage device
138
1391. Connect the USB pen drive or the microSD card to the Nexys Video board.
140 The microSD slot sits on the bottom of the board and marked "SD MICRO", USB header is in the top and marked "USB HOST".
Greg Chadwick7c2b7072019-11-01 14:41:13 +00001412. Place JP4 on the pins marked USB/SD.
1423. Place JP3 according to the selected device (marked either USB or SD).
1434. Push the PROG button. Done LED (LD014) should be steadily on.
1445. Wait for the Done LED to be turned off.
Ohad Russoe76fadc2019-10-29 12:34:21 -0700145
146### Run software on the FPGA
147
148**Note**: Your user account needs to have access to connected USB devices.
Greg Chadwick7c2b7072019-11-01 14:41:13 +0000149See [the section udev rules of the installation guide]({{< relref "install_instructions#device-permissions-udev-rules" >}}) for more details.
Ohad Russoe76fadc2019-10-29 12:34:21 -0700150
Greg Chadwick7c2b7072019-11-01 14:41:13 +00001511. The `spiflash` tool which loads software onto the FPGA requires `libusb 1.x` and `libftdi1 1.x`, under Ubuntu they can be installed with:
152 ```console
153 $ sudo apt-get install libftdi1-2 libusb-1.0-0
154 ```
1552. Connect a micro USB cable from your machine to the UART connector (J13) on Nexys Video board.
1563. Use `dmesg` to determine which serial port was assigned:
Ohad Russoe76fadc2019-10-29 12:34:21 -0700157
Greg Chadwick7c2b7072019-11-01 14:41:13 +0000158 ```console
159 $ dmesg
160 [23426.869858] usb 1-3: new full-speed USB device number 27 using xhci_hcd
161 [23427.023299] usb 1-3: New USB device found, idVendor=0403, idProduct=6001, bcdDevice= 6.00
162 [23427.023301] usb 1-3: New USB device strings: Mfr=1, Product=2, SerialNumber=3
163 [23427.023301] usb 1-3: Product: FT232R USB UART
164 [23427.023302] usb 1-3: Manufacturer: FTDI
165 [23427.023303] usb 1-3: SerialNumber: A503XQQS
166 [23427.026674] ftdi_sio 1-3:1.0: FTDI USB Serial Device converter detected
167 [23427.026691] usb 1-3: Detected FT232RL
168 [23427.027019] usb 1-3: FTDI USB Serial Device converter now attached to ttyUSB0
169 ```
170
171 It should be named `/dev/ttyUSB*` in this example it is `/dev/ttyUSB0`.
1724. Open a serial console (use the device file determined before) and connect.
Ohad Russoe76fadc2019-10-29 12:34:21 -0700173 Settings: 230400 baud, 8N1, no hardware or software flow control.
174
175 ```bash
176 screen /dev/ttyUSB0 230400
177 ```
178
Greg Chadwick7c2b7072019-11-01 14:41:13 +00001795. On the Nexys Video board, press the red button labeled CPU_RESET.
1806. Observe the terminal output, it should show a ROM boot message like this:
Ohad Russoe76fadc2019-10-29 12:34:21 -0700181
182 ```
Greg Chadwick7c2b7072019-11-01 14:41:13 +0000183 Commit ID: 1d0d927693c2ef60d7880ab306beb25115a53dcb
184 Build Date: 2019-11-01, 15:57:43
Ohad Russoe76fadc2019-10-29 12:34:21 -0700185 Jump!
186 ```
Greg Chadwick7c2b7072019-11-01 14:41:13 +0000187 (To exit `screen` press <kbd>CTRL</kbd>+<kbd>A</kbd> keys together, then press <kbd>K</kbd>, and then confirm exit by pressing <kbd>y</kbd>.)
1887. Connect a micro USB cable from your machine to the PROG connector (J12) on the Nexsys Video board (noting you need to also have a connection to the UART connector to see serial output).
1898. Use the `spiflash` tool to write the hello_world binary:
190 ```console
191 $ cd $OT_TOP
192 $ ./sw/host/spiflash/spiflash --input=sw/device/fpga/examples/hello_world/sw.bin
193 ```
194 You should see output from the `spiflash` tool showing the progress:
195 ```console
196 Running SPI flash update.
197 Image divided into 6 frames.
198 frame: 0x00000000 to offset: 0x00000000
199 frame: 0x00000001 to offset: 0x000003d8
200 frame: 0x00000002 to offset: 0x000007b0
201 frame: 0x00000003 to offset: 0x00000b88
202 frame: 0x00000004 to offset: 0x00000f60
203 frame: 0x80000005 to offset: 0x00001338
204 ```
Ohad Russoe76fadc2019-10-29 12:34:21 -0700205
Greg Chadwick7c2b7072019-11-01 14:41:13 +0000206 and matching output from the serial console from the boot rom loading the program:
207 ```console
208 Processing frame no: 00000000 exp no: 00000000
209 Processing frame no: 00000001 exp no: 00000001
210 Processing frame no: 00000002 exp no: 00000002
211 Processing frame no: 00000003 exp no: 00000003
212 Processing frame no: 00000004 exp no: 00000004
213 Processing frame no: 80000005 exp no: 00000005
214 bootstrap: DONE!
215 Jump!
216 ```
2179. The hello_world binary will output the following:
218 ```console
219 Hello World! Oct 31 2019 16:28:03
220 Watch the LEDs!
221 Try out the switches on the board
222 or type anything into the console window.
223 The LEDs show the ASCII code of the last character.
224 FTDI control changed. Enable JTAG
225 ```
Ohad Russoe76fadc2019-10-29 12:34:21 -0700226
Greg Chadwick7c2b7072019-11-01 14:41:13 +0000227 Press some keys in the serial console and you should see the ASCII values of the characters sent shown in binary on the LEDs of the Nexsys Video FPGA board.
Ohad Russoe76fadc2019-10-29 12:34:21 -0700228
Greg Chadwick7c2b7072019-11-01 14:41:13 +0000229To build the software yourself follow the instructions in [Testing the demo design]({{< relref "getting_started_fpga.md#testing-the-demo-design" >}}).
230See the [Getting Started on FPGAs Guide]({{< relref "getting_started_fpga.md" >}}) for full instructions how to build your own bitstream.