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opensecura / 3p / lowrisc / opentitan / 6f7094c7b1fc37b0a1955a04d3c259aab86d50c5 / . / doc / project / sw_checklist.md.tpl
blob: 605cbd0bd08672a3fd53e137b4feda025538ef77 [file] [log] [blame]
Sam Elliottb988cbc2020-04-20 19:56:54 +0100[diff] [blame]1---
Timothy Trippelce9232e2021-09-13 22:48:18 +0000[diff] [blame]2title: "${ip.name_long_upper} DIF Checklist"
Sam Elliottb988cbc2020-04-20 19:56:54 +0100[diff] [blame]3---
4
Timothy Trippelce9232e2021-09-13 22:48:18 +0000[diff] [blame]5<%doc>
6 This templates requires the following Python objects to be passed:
7
8 1. ip: See util/make_new_dif.py for the definition of the `ip` obj.
9</%doc>
10
Sam Elliottb988cbc2020-04-20 19:56:54 +0100[diff] [blame]11<!--
12NOTE: This is a template checklist document that is required to be copied over
Timothy Trippelce9232e2021-09-13 22:48:18 +0000[diff] [blame]13to `sw/device/lib/dif/dif_${ip.name_snake}.md` for a new DIF that transitions
Sam Elliottb988cbc2020-04-20 19:56:54 +0100[diff] [blame]14from L0 (Specification) to L1 (Development) stage, and updated as needed.
15Once done, please remove this comment before checking it in.
16-->
Timothy Trippelce9232e2021-09-13 22:48:18 +0000[diff] [blame]17This checklist is for [Development Stage]({{< relref "/doc/project/development_stages.md" >}}) transitions for the [${ip.name_long_upper} DIF]({{< relref "hw/ip/${ip.name_snake}/doc" >}}).
Sam Elliottb988cbc2020-04-20 19:56:54 +0100[diff] [blame]18All checklist items refer to the content in the [Checklist]({{< relref "/doc/project/checklist.md" >}}).
19
Timothy Trippel48a9fb72022-02-10 22:36:40 -0800[diff] [blame]20<h2>DIF Checklist</h2>
Sam Elliottb988cbc2020-04-20 19:56:54 +0100[diff] [blame]21
Timothy Trippel48a9fb72022-02-10 22:36:40 -0800[diff] [blame]22<h3>S1</h3>
Sam Elliottb988cbc2020-04-20 19:56:54 +0100[diff] [blame]23
24Type | Item | Resolution | Note/Collaterals
25---------------|----------------------|-------------|------------------
26Implementation | [DIF_EXISTS][] | Not Started |
27Implementation | [DIF_USED_IN_TREE][] | Not Started |
Sam Elliottf8456182020-11-19 12:21:30 +0000[diff] [blame]28Tests | [DIF_TEST_SMOKE][] | Not Started |
Sam Elliottb988cbc2020-04-20 19:56:54 +0100[diff] [blame]29
Michael Schaffner945bbef2020-10-09 19:20:39 -0700[diff] [blame]30[DIF_EXISTS]: {{< relref "/doc/project/checklist.md#dif_exists" >}}
31[DIF_USED_IN_TREE]: {{< relref "/doc/project/checklist.md#dif_used_in_tree" >}}
Sam Elliottf8456182020-11-19 12:21:30 +0000[diff] [blame]32[DIF_TEST_SMOKE]: {{< relref "/doc/project/checklist.md#dif_test_smoke" >}}
Sam Elliottb988cbc2020-04-20 19:56:54 +0100[diff] [blame]33
Timothy Trippel48a9fb72022-02-10 22:36:40 -0800[diff] [blame]34<h3>S2</h3>
Sam Elliottb988cbc2020-04-20 19:56:54 +0100[diff] [blame]35
36Type | Item | Resolution | Note/Collaterals
37---------------|-----------------------------|-------------|------------------
Sam Elliott81439a82020-07-23 12:37:55 +0100[diff] [blame]38Coordination | [DIF_HW_FEATURE_COMPLETE][] | Not Started | [HW Dashboard]({{< relref "hw" >}})
Timothy Trippel48a9fb72022-02-10 22:36:40 -0800[diff] [blame]39Implementation | [DIF_FEATURES][] | Not Started |
Sam Elliottb988cbc2020-04-20 19:56:54 +0100[diff] [blame]40Coordination | [DIF_DV_TESTS][] | Not Started |
Sam Elliottb988cbc2020-04-20 19:56:54 +0100[diff] [blame]41
Michael Schaffner945bbef2020-10-09 19:20:39 -0700[diff] [blame]42[DIF_HW_FEATURE_COMPLETE]: {{< relref "/doc/project/checklist.md#dif_hw_feature_complete" >}}
Timothy Trippel48a9fb72022-02-10 22:36:40 -0800[diff] [blame]43[DIF_FEATURES]: {{< relref "/doc/project/checklist.md#dif_features" >}}
Michael Schaffner945bbef2020-10-09 19:20:39 -0700[diff] [blame]44[DIF_DV_TESTS]: {{< relref "/doc/project/checklist.md#dif_dv_tests" >}}
Sam Elliottb988cbc2020-04-20 19:56:54 +0100[diff] [blame]45
Timothy Trippel48a9fb72022-02-10 22:36:40 -0800[diff] [blame]46<h3>S3</h3>
Sam Elliottb988cbc2020-04-20 19:56:54 +0100[diff] [blame]47
48Type | Item | Resolution | Note/Collaterals
49---------------|----------------------------------|-------------|------------------
50Coordination | [DIF_HW_DESIGN_COMPLETE][] | Not Started |
51Coordination | [DIF_HW_VERIFICATION_COMPLETE][] | Not Started |
Timothy Trippel48a9fb72022-02-10 22:36:40 -0800[diff] [blame]52Documentation | [DIF_DOC_HW][] | Not Started |
53Code Quality | [DIF_CODE_STYLE][] | Not Started |
54Tests | [DIF_TEST_UNIT][] | Not Started |
Sam Elliottb988cbc2020-04-20 19:56:54 +0100[diff] [blame]55Review | [DIF_TODO_COMPLETE][] | Not Started |
Sam Elliottb988cbc2020-04-20 19:56:54 +0100[diff] [blame]56Review | Reviewer(s) | Not Started |
57Review | Signoff date | Not Started |
58
Michael Schaffner945bbef2020-10-09 19:20:39 -0700[diff] [blame]59[DIF_HW_DESIGN_COMPLETE]: {{< relref "/doc/project/checklist.md#dif_hw_design_complete" >}}
60[DIF_HW_VERIFICATION_COMPLETE]: {{< relref "/doc/project/checklist.md#dif_hw_verification_complete" >}}
Timothy Trippel48a9fb72022-02-10 22:36:40 -0800[diff] [blame]61[DIF_DOC_HW]: {{< relref "/doc/project/checklist.md#dif_doc_hw" >}}
62[DIF_CODE_STYLE]: {{< relref "/doc/project/checklist.md#dif_code_style" >}}
63[DIF_TEST_UNIT]: {{< relref "/doc/project/checklist.md#dif_test_unit" >}}
Michael Schaffner945bbef2020-10-09 19:20:39 -0700[diff] [blame]64[DIF_TODO_COMPLETE]: {{< relref "/doc/project/checklist.md#dif_todo_complete" >}}