blob: 7463645030bcc392ff66e184e1bfe9a36c6ca4e8 [file] [log] [blame] [view]
Hugo McNallyf6298b32023-02-12 14:47:22 +00001# Reference Manuals
Garret Kelly9eebde02019-10-22 15:36:49 -04002
Hugo McNallyaef0a662023-02-11 19:44:55 +00003* [Comportability Definition and Specification](../doc/contributing/hw/comportability/README.md)
4* [Device Interface Function (DIF) Specification](../doc/contributing/sw/device_interface_functions.md)
Garret Kelly9eebde02019-10-22 15:36:49 -04005* Tool Guides
Hugo McNallyaef0a662023-02-11 19:44:55 +00006 * [Topgen Tool](./topgen/README.md): Describes `topgen.py` and its Hjson format source. Used to generate rtl and validation files for top specific modules such as PLIC, Pinmux and crossbar.
7 * [Register Tool](./reggen/README.md): Describes `regtool.py` and its Hjson format source. Used to generate documentation, rtl, header files and validation files for IP Registers and toplevel.
8 * [Ipgen Tool](./ipgen/README.md): Describes `ipgen.py` and its Hjson control file. Used to generate IP blocks from IP templates.
9 * [Crossbar Tool](./tlgen/README.md): Describes `tlgen.py` and its Hjson format source. Used to generate self-documentation, rtl files of the crossbars at the toplevel.
10 * [Vendor-In Tool](./doc/vendor.md): Describes `util/vendor.py` and its Hjson control file. Used to pull a local copy of code maintained in other upstream repositories and apply local patch sets.
11* [FPGA Reference Manual](../doc/contributing/fpga/ref_manual_fpga.md)
Hugo McNally544e7a62023-02-12 01:12:36 +000012* [OpenTitan Continuous Integration](../doc/contributing/ci/README.md)