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lowRISC Contributors802543a2019-08-31 12:12:56 +01001# Simple SPI Tests
2
Scott Johnsonc668cf92019-10-30 11:49:13 -07003`spitest` is a trivial Python tool for interacting with the SPI device
4code in the `hello_world` test program running on `top_earlgrey` on the
5FPGA board.
lowRISC Contributors802543a2019-08-31 12:12:56 +01006
7The same FTDI interface is used for SPI as for JTAG, so this tool
8cannot be used at the same time as an OpenOCD debugger. The
9`top_earlgray_nexsysvideo` pin mux has been modified to use one of the
10FTDI GPIOs to select between the two interfaces, so it is possible to
11dynamically switch between the tools. This status bit is also
Scott Johnsonc668cf92019-10-30 11:49:13 -070012presented as `GPIO[16]` (which was previously unused).
lowRISC Contributors802543a2019-08-31 12:12:56 +010013
Scott Johnsonc668cf92019-10-30 11:49:13 -070014The example commands assume `$REPO_TOP` is set to the toplevel directory
lowRISC Contributors802543a2019-08-31 12:12:56 +010015of the repo.
16
17### Setup
18
19If packages have not previously been installed you will need to set a
20few things up. First use `apt` and `pip3` to install some required packages:
Scott Johnsonc668cf92019-10-30 11:49:13 -070021
22```console
lowRISC Contributors802543a2019-08-31 12:12:56 +010023$ sudo apt-get install libusb-1.0
24$ pip3 install --user pyftdi
25```
26
27You also need the `udev` rules to be set correctly by following the
28instructions for setting up the Xilinx tools.
29
30### SPI/JTAG selection GPIO
31
32The tool can be used to test the SPI/JTAG selection gpio. This is done
33by providing the `--flippy` or `-f` argument which causes the
34selection to be flipped 10 times with 2 second pauses between. The
35`hello_world` program will see the bit flip and print a message.
36
37
Scott Johnsonc668cf92019-10-30 11:49:13 -070038```console
lowRISC Contributors802543a2019-08-31 12:12:56 +010039$ cd $REPO_TOP/util/simplespi
40$ ./spitest.py -f
41```
42
43
44### SPI Protocol Test
45
46The SPI protocol used in the test is a simple exchange of 4-byte
47messages. When data is received from the SPI Device interface the
48`hello_world` program will receive and print it out on the UART. The
49first four bytes have their bottom bit inverted and are returned in
50the next SPI transaction. If the sender is faster than the FPGA then
51messages are aggregated in the receive buffer and will appear as a
52single long message to `hello_world` which will only return a single
534-byte message.
54
55A simple test should therefore just use 4 characters.
56
57
Scott Johnsonc668cf92019-10-30 11:49:13 -070058```console
lowRISC Contributors802543a2019-08-31 12:12:56 +010059$ cd $REPO_TOP/util/simplespi
60$ ./spitest.py 1234
61$ ./spitest.py 5678
62```
63
64Long messages will be padded to a multiple of 4 bytes before being
65sent, and there may be some garbage return messages.
66
Scott Johnsonc668cf92019-10-30 11:49:13 -070067```console
lowRISC Contributors802543a2019-08-31 12:12:56 +010068$ cd $REPO_TOP/util/simplespi
69$ ./spitest.py the quick brown fox jumps
70```
71
72Messages of any length (the length given is used even if not a
73multiple of 4) may be generated by the tool. The message is formed
Scott Johnsonc668cf92019-10-30 11:49:13 -070074from repeating the ascii characters `0123456789abcdef` (to fill the
lowRISC Contributors802543a2019-08-31 12:12:56 +010075required length) and sent, and there may be some garbage return
76messages.
77
Scott Johnsonc668cf92019-10-30 11:49:13 -070078```console
lowRISC Contributors802543a2019-08-31 12:12:56 +010079$ cd $REPO_TOP/util/simplespi
80$ ./spitest.py -l 120
81```