| commit | f9e3b64968a789b55298dcbae2cd8b0e15d7cc75 | [log] [tgz] |
|---|---|---|
| author | Stefan Hall <stefanhall@google.com> | Fri Apr 11 15:16:54 2025 -0700 |
| committer | Stefan Hall <stefanhall@google.com> | Tue Apr 15 13:35:08 2025 -0700 |
| tree | a3871c1d0d026d9a025536e5ecf14231627c231a | |
| parent | fc28b082d2644437d1d4aa266e9f75c72137b7df [diff] |
Port Width Fixes: Required for syn Synopsys synthesis will not resolve port mismatches in real time and mismatches therefore result in matcha syn runs failing. This CL topic fixes port width mismatches in wherever they're seen by synopsys tools. VCS build.log has been the most useful resource for finding these. A separate CL:1600 in opensecura 3p/ip/isp was also made in an effort to fix port mismatches. https://opensecura-review.git.corp.google.com/c/3p/ip/isp/+/1600 Change-Id: I59c4ca80f14fffa01172cd0b3b43f111da2abcea
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
This repository contains hardware, software and utilities written as part of the OpenTitan project. It is structured as monolithic repository, or “monorepo”, where all components live in one repository. It exists to enable collaboration across partners participating in the OpenTitan project.
The project contains comprehensive documentation of all IPs and tools. You can access it online at docs.opentitan.org.
Have a look at CONTRIBUTING and our documentation on project organization and processes for guidelines on how to contribute code to this repository.
Unless otherwise noted, everything in this repository is covered by the Apache License, Version 2.0 (see LICENSE for full text).