update riviera.hjson

Signed-off-by: Dawid Zimonczyk <dawidz@aldec.com.pl>
diff --git a/hw/dv/tools/dvsim/riviera.hjson b/hw/dv/tools/dvsim/riviera.hjson
index ecc0b07..d7a9fb4 100644
--- a/hw/dv/tools/dvsim/riviera.hjson
+++ b/hw/dv/tools/dvsim/riviera.hjson
@@ -9,12 +9,12 @@
   // {tool_srcs_dir} before running the simulation.
   tool_srcs:  ["{dv_root}/tools/riviera/*"]
 
-  build_opts: ["-sv",
-               "-timescale 1ns/1ps",
-               "-uvmver 1.2",
+  build_opts: ["-timescale 1ns/1ps",
+               "+incdir+\"{ALDEC_PATH}/vlib/uvm-1.2/src\"",
+               "\"{ALDEC_PATH}/vlib/uvm-1.2/src/uvm_pkg.sv\"",
                "-f {sv_flist}",
                // List multiple tops for the simulation. Prepend each top level with `-top`.
-               "{eval_cmd} echo {sim_tops} | sed -E 's/(\\S+)/-top \\1/g'",
+               //"{eval_cmd} echo {sim_tops} | sed -E 's/(\\S+)/-top \\1/g'",
               ]
 
   run_opts:   ["-sv_seed={seed}",
@@ -23,6 +23,7 @@
                "-lib {sv_flist_gen_dir}/work",
                "+UVM_TESTNAME={uvm_test}",
                "+UVM_TEST_SEQ={uvm_test_seq}",
+               "-sv_lib \"{ALDEC_PATH}/bin/uvm_1_2_dpi\"",			   
                "-do {run_script}"]
 
 
@@ -89,5 +90,12 @@
       is_sim_mode: 1
       build_opts: []
     }
+	{
+    // TODO: Add build and run options to enable zero delay loop detection.
+      name: riviera_loopdetect
+      is_sim_mode: 1
+      build_opts: []
+      run_opts:   []
+    }
   ]
 }