| # Copyright lowRISC contributors. |
| # Licensed under the Apache License, Version 2.0, see LICENSE for details. |
| # SPDX-License-Identifier: Apache-2.0 |
| # |
| # Meridian RDC ENV |
| # |
| # This .env file defines additional constraints on top of |
| # chip_earlgrey_asic.sdc. This file adds constraints below: |
| # |
| # 1. Reset groups |
| # 2. Set Constant |
| |
| # BROUT to 0 for reset testing |
| # BROUT OR-ed with POR_N inside AST. Need to tie to 0 for POR_N to take effect |
| set_constant -value 1'b0 u_ast.rglssm_brout |
| |
| # Set MuBi4False(4'h9) scanmode |
| set_constant -value 4'h9 scanmode |
| |
| # Define POK as reset |
| create_reset -interval 10 -waveform AON_CLK u_ast.u_rglts_pdm_3p3v.vcaon_pok_h |
| |
| # Define SPI_DEVICE CSB as reset |
| create_reset -interval 10 -high -waveform SPI_DEV_CLK top_earlgrey.u_spi_device.rst_csb_buf |
| |
| # Define SPI_DEVICE TPM CSb as reset |
| create_reset -interval 10 -high -waveform SPI_DEV_CLK top_earlgrey.u_spi_device.rst_tpm_csb_buf |
| |
| # SPI_DEVICE CONTROL.mode is stable during the reset analysis |
| # set_stable_value top_earlgrey.u_spi_device.u_reg.u_control_mode.q -name SpidControlMode -comment {SW changes the CSR when SPI is idle} |
| |
| # JTAG Reset Test |
| # top_earlgrey.u_pinmux_aon.u_pinmux_strap_sampling.tap_strap_q 'b01 for LC_CTRL , 'b10 for RV_DM |
| create_reset -interval 100 top_earlgrey.u_pinmux_aon.u_pinmux_strap_sampling.jtag_req.trst_n -name TRST_N -waveform JTAG_TCK |
