commit ef231bb2f8dd4929037c11dc490b6d5d3f9b43bc
author Andreas Kurth <adk@lowrisc.org> Tue Mar 14 14:28:11 2023 +0000
committer Andreas Kurth <github@akurth.net> Wed Mar 15 08:17:59 2023 +0100
tree ac94c1b3b6d28168d7beab8385c66587bf6cc094
parent 5da9c6345b687281da75091285c32ff812123720

[earlgrey/dv] Remove outdated TODO comment

A known answer test for CSRNG that includes the generated bits has been
added in PR #13341.  We thus know there is no mismatch there.  The
referenced issue (#7505) has already been closed.

Signed-off-by: Andreas Kurth <adk@lowrisc.org>

hw/top_earlgrey/dv/chip_smoketests.hjson

diff --git a/hw/top_earlgrey/dv/chip_smoketests.hjson b/hw/top_earlgrey/dv/chip_smoketests.hjson
index da11453..64f8522 100644
--- a/hw/top_earlgrey/dv/chip_smoketests.hjson
+++ b/hw/top_earlgrey/dv/chip_smoketests.hjson
@@ -25,7 +25,6 @@
       sw_images: ["//sw/device/tests:clkmgr_smoketest:1"]
       en_run_modes: ["sw_test_mode_test_rom"]
     }
-    // TODO(lowrisc/opentitan#7505): Debug CSRNG generate bits mismatch.
     {
      name: chip_sw_csrng_smoketest
      uvm_test_seq: chip_sw_base_vseq