[tlul,rtl] Rewrite a_ack_q computation to avoid lint warnings

With the previous version, the a_ack_q flop was dead zero if
EnableIntg was false. This caused AscentLint warnings about a constant
flop. Re-jig things so that the flop is only generated when it will be
used and the output signal (a_ack_q) is a constant zero if not.

Signed-off-by: Rupert Swarbrick <rswarbrick@lowrisc.org>

hw/ip/tlul/rtl/tlul_sram_byte.sv

diff --git a/hw/ip/tlul/rtl/tlul_sram_byte.sv b/hw/ip/tlul/rtl/tlul_sram_byte.sv
index d865e96..8cb8409 100644
--- a/hw/ip/tlul/rtl/tlul_sram_byte.sv
+++ b/hw/ip/tlul/rtl/tlul_sram_byte.sv
@@ -69,7 +69,7 @@
   logic wr_txn;
   logic byte_wr_txn;
   logic byte_req_ack;
-  logic a_ack_q, a_ack_d;
+  logic a_ack_q;
 
   assign a_ack = tl_i.a_valid & tl_o.a_ready;
   assign sram_a_ack = tl_sram_o.a_valid & tl_sram_i.a_ready;
@@ -82,11 +82,17 @@
     assign byte_wr_txn = tl_i.a_valid & ~&tl_i.a_mask & wr_txn;
     assign sel_int = byte_wr_txn | stall_host ? SelInt : SelPassThru;
     // TODO(#7461): remove this register, once this issue has been addressed.
-    assign a_ack_d = a_ack;
+    always_ff @(posedge clk_i or negedge rst_ni) begin : p_regs
+      if (!rst_ni) begin
+         a_ack_q <= 1'b0;
+      end else begin
+         a_ack_q <= a_ack;
+      end
+    end
   end else begin : gen_static_sel
     assign byte_wr_txn = '0;
     assign sel_int = SelPassThru;
-    assign a_ack_d = 1'b0;
+    assign a_ack_q = 1'b0;
   end
 
   // state machine handling
@@ -141,14 +147,6 @@
 
   end
 
-  always_ff @(posedge clk_i or negedge rst_ni) begin : p_regs
-    if (!rst_ni) begin
-       a_ack_q <= 1'b0;
-    end else begin
-       a_ack_q <= a_ack_d;
-    end
-  end
-
   // prim fifo for capturing info
   typedef struct packed {
     logic                  [2:0]  a_param;