blob: e4b52cd9d480419b6808908ca7e906f4ee1b34cf [file] [log] [blame]
// Copyright lowRISC contributors.
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0
{
name: "rom_ctrl"
import_testplans: ["hw/dv/tools/dvsim/testplans/csr_testplan.hjson",
"hw/dv/tools/dvsim/testplans/alert_test_testplan.hjson",
"hw/dv/tools/dvsim/testplans/mem_testplan.hjson",
"hw/dv/tools/dvsim/testplans/tl_device_access_types_testplan.hjson"]
testpoints: [
{
name: smoke
desc: '''
Smoke test exercising the main features of rom_ctrl.
**Stimulus**:
- Create a random valid ROM where expected digest doesn't match with the KMAC digest
image and load into memory model
- Allow the rom check to complete
- Perform some random memory accesses
**Checks**:
- Check that all data supplied to kmac is correct
- Check that the rom checking sequence gives the expected result
- Check that the memory accesses return expected data
- Check that pwrmgr_data_o.good is not asserted.
'''
milestone: V1
tests: ["rom_ctrl_smoke"]
}
{
name: successful_rom_chk
desc: '''
Test successful completion of rom check
**Stimulus**:
- Create a random valid ROM image and load into memory model.
- Ensure that KMAC and expected digest match.
**Checks**:
- Check that pwrmgr_data_o.good is asserted.
'''
milestone: V1
tests: []
}
{
name: multiple_reset
desc: '''
Test where the design is reset many times and the rom is re-checked
**Stimulus**:
- Periodically reset the device to restart the rom check
**Checks**:
- Check that the digest csrs are not corrupted
'''
milestone: V2
tests: []
}
{
name: corrupt_sig_fatal_chk
desc: '''
Corrupt integrity of signals like the select signal to addr mux.
**Checks**:
- Check that fatal error is flagged.
'''
milestone: V2S
tests: []
}
]
covergroups: [
{
name: rom_ctrl_kmac_cg
desc: '''
Collect coverage on the rom_ctrl / kmac interface, specifically around
stalling and back-pressure behavior.
The agent needs to cover the case where the kmac returns a digest
before the rom_ctrl finishes reading the expected digest from memory,
and also after.
'''
}
{
name: rom_ctrl_tlul_cg
desc: '''
Collect coverage on the two TLUL interfaces, specifically checking
that we see requests around the same time as the rom check completes.
'''
}
{
name: rom_ctrl_check_cg
desc: '''
Collect coverage on the outputs sent to the power manager to confirm
that we see pass and fail resutls.
'''
}
]
}