[spi_host/device] Connect quad SPI signals and SPI host shells to top
Signed-off-by: Michael Schaffner <msf@google.com>
diff --git a/hw/top_earlgrey/data/top_earlgrey.hjson b/hw/top_earlgrey/data/top_earlgrey.hjson
index a5595cf..bc4adb6 100644
--- a/hw/top_earlgrey/data/top_earlgrey.hjson
+++ b/hw/top_earlgrey/data/top_earlgrey.hjson
@@ -155,6 +155,8 @@
{ name: "sys_io_div4", gen: true, type: "top", domains: ["Aon", "0"], parent: "sys_src", clk: "io_div4" }
{ name: "sys_aon", gen: true, type: "top", domains: ["Aon", "0"], parent: "sys_src", clk: "aon" }
{ name: "spi_device", gen: true, type: "top", domains: [ "0"], parent: "sys_src", clk: "io_div2", sw: 1 }
+ { name: "spi_host0", gen: true, type: "top", domains: [ "0"], parent: "sys_src", clk: "io_div2", sw: 1 }
+ { name: "spi_host1", gen: true, type: "top", domains: [ "0"], parent: "sys_src", clk: "io_div2", sw: 1 }
{ name: "usb", gen: true, type: "top", domains: [ "0"], parent: "sys_src", clk: "usb", sw: 1 }
{ name: "i2c0", gen: true, type: "top", domains: [ "0"], parent: "sys_src", clk: "io_div2", sw: 1 },
{ name: "i2c1", gen: true, type: "top", domains: [ "0"], parent: "sys_src", clk: "io_div2", sw: 1 },
@@ -278,6 +280,20 @@
reset_connections: {rst_ni: "spi_device"},
base_addr: "0x40050000",
},
+ { name: "spi_host0",
+ type: "spi_host",
+ clock_srcs: {clk_i: "io_div4"},
+ clock_group: "peri",
+ reset_connections: {rst_ni: "spi_host0"},
+ base_addr: "0x40060000",
+ },
+ { name: "spi_host1",
+ type: "spi_host",
+ clock_srcs: {clk_i: "io_div4"},
+ clock_group: "peri",
+ reset_connections: {rst_ni: "spi_host1"},
+ base_addr: "0x40070000",
+ },
{ name: "i2c0",
type: "i2c",
clock_srcs: {clk_i: "io_div4"},
@@ -869,11 +885,9 @@
// Dedicated IO modules. The in/out ports of the modules below are connected
// to TOP IO port through PADS directly. It bypasses PINMUX multiplexers
dio_modules: [
- { name: "spi_device", pad: ["ChB[0..3]"] },
- //{ name: "uart.tx", pad: ["ChA[0]"]},
- { name: "uart0", pad: ["ChA[0..1]"]},
- // { name: "dio_module.signal_input", pad: ["ChA[31]"] }
- { name: "usbdev", pad: ["ChC[0..8]"]},
+ { name: "spi_device", pad: ["ChC[0..5]"] },
+ { name: "spi_host0", pad: ["ChB[0..5]"] },
+ { name: "usbdev", pad: ["ChA[0..8]"] },
],
// Multiplexing IO modules. The in/out ports of the modules below are
@@ -881,8 +895,8 @@
// between the modules and the IO PADS.
// If `mio_modules` aren't defined, it uses all remaining modules from
// module list except defined in `dio_modules`.
- mio_modules: ["gpio", "uart1", "uart2", "uart3",
- "i2c0", "i2c1", "i2c2", "pattgen"]
+ mio_modules: ["gpio", "uart0", "uart1", "uart2", "uart3",
+ "i2c0", "i2c1", "i2c2", "pattgen", "spi_host1"]
// If any module isn't defined in above two lists, its inputs will be tied
// to 0, and the output/OE signals will be floating (or connected to
