[spi_host/device] Connect quad SPI signals and SPI host shells to top
Signed-off-by: Michael Schaffner <msf@google.com>
diff --git a/hw/top_earlgrey/data/autogen/top_earlgrey.gen.hjson b/hw/top_earlgrey/data/autogen/top_earlgrey.gen.hjson
index 4896249..c3705fc 100644
--- a/hw/top_earlgrey/data/autogen/top_earlgrey.gen.hjson
+++ b/hw/top_earlgrey/data/autogen/top_earlgrey.gen.hjson
@@ -338,6 +338,30 @@
sw: 1
}
{
+ name: spi_host0
+ gen: true
+ type: top
+ domains:
+ [
+ "0"
+ ]
+ parent: sys_src
+ clk: io_div2
+ sw: 1
+ }
+ {
+ name: spi_host1
+ gen: true
+ type: top
+ domains:
+ [
+ "0"
+ ]
+ parent: sys_src
+ clk: io_div2
+ sw: 1
+ }
+ {
name: usb
gen: true
type: top
@@ -1180,21 +1204,16 @@
width: 1
type: input
}
- {
- name: sdi
- width: 1
- type: input
- }
]
- available_output_list:
+ available_output_list: []
+ available_inout_list:
[
{
- name: sdo
- width: 1
- type: output
+ name: sd
+ width: 4
+ type: inout
}
]
- available_inout_list: []
param_list: []
interrupt_list:
[
@@ -1294,6 +1313,140 @@
]
}
{
+ name: spi_host0
+ type: spi_host
+ clock_srcs:
+ {
+ clk_i: io_div4
+ }
+ clock_group: peri
+ reset_connections:
+ {
+ rst_ni: rstmgr_aon_resets.rst_spi_host0_n[rstmgr_pkg::Domain0Sel]
+ }
+ base_addr: 0x40060000
+ clock_connections:
+ {
+ clk_i: clkmgr_aon_clocks.clk_io_div4_peri
+ }
+ domain: "0"
+ size: 0x1000
+ bus_device: tlul
+ bus_host: none
+ available_input_list: []
+ available_output_list:
+ [
+ {
+ name: sck
+ width: 1
+ type: output
+ }
+ {
+ name: csb
+ width: 1
+ type: output
+ }
+ ]
+ available_inout_list:
+ [
+ {
+ name: sd
+ width: 4
+ type: inout
+ }
+ ]
+ param_list: []
+ interrupt_list: []
+ alert_list: []
+ wakeup_list: []
+ reset_request_list: []
+ scan: "true"
+ scan_reset: "false"
+ inter_signal_list:
+ [
+ {
+ struct: tl
+ package: tlul_pkg
+ type: req_rsp
+ act: rsp
+ name: tl
+ inst_name: spi_host0
+ width: 1
+ default: ""
+ end_idx: -1
+ top_signame: spi_host0_tl
+ index: -1
+ }
+ ]
+ }
+ {
+ name: spi_host1
+ type: spi_host
+ clock_srcs:
+ {
+ clk_i: io_div4
+ }
+ clock_group: peri
+ reset_connections:
+ {
+ rst_ni: rstmgr_aon_resets.rst_spi_host1_n[rstmgr_pkg::Domain0Sel]
+ }
+ base_addr: 0x40070000
+ clock_connections:
+ {
+ clk_i: clkmgr_aon_clocks.clk_io_div4_peri
+ }
+ domain: "0"
+ size: 0x1000
+ bus_device: tlul
+ bus_host: none
+ available_input_list: []
+ available_output_list:
+ [
+ {
+ name: sck
+ width: 1
+ type: output
+ }
+ {
+ name: csb
+ width: 1
+ type: output
+ }
+ ]
+ available_inout_list:
+ [
+ {
+ name: sd
+ width: 4
+ type: inout
+ }
+ ]
+ param_list: []
+ interrupt_list: []
+ alert_list: []
+ wakeup_list: []
+ reset_request_list: []
+ scan: "true"
+ scan_reset: "false"
+ inter_signal_list:
+ [
+ {
+ struct: tl
+ package: tlul_pkg
+ type: req_rsp
+ act: rsp
+ name: tl
+ inst_name: spi_host1
+ width: 1
+ default: ""
+ end_idx: -1
+ top_signame: spi_host1_tl
+ index: -1
+ }
+ ]
+ }
+ {
name: i2c0
type: i2c
clock_srcs:
@@ -7580,6 +7733,14 @@
[
peri.tl_spi_device
]
+ spi_host0.tl:
+ [
+ peri.tl_spi_host0
+ ]
+ spi_host1.tl:
+ [
+ peri.tl_spi_host1
+ ]
rv_timer.tl:
[
peri.tl_rv_timer
@@ -8362,6 +8523,8 @@
pattgen
gpio
spi_device
+ spi_host0
+ spi_host1
rv_timer
usbdev
pwrmgr_aon
@@ -8373,9 +8536,9 @@
lc_ctrl
sensor_ctrl_aon
alert_handler
- nmi_gen
ast_wrapper
sram_ctrl_ret_aon
+ nmi_gen
]
}
nodes:
@@ -8572,6 +8735,42 @@
pipeline_byp: "true"
}
{
+ name: spi_host0
+ type: device
+ clock: clk_peri_i
+ reset: rst_peri_ni
+ pipeline: "false"
+ inst_type: spi_host
+ addr_range:
+ [
+ {
+ base_addr: 0x40060000
+ size_byte: 0x1000
+ }
+ ]
+ xbar: false
+ stub: false
+ pipeline_byp: "true"
+ }
+ {
+ name: spi_host1
+ type: device
+ clock: clk_peri_i
+ reset: rst_peri_ni
+ pipeline: "false"
+ inst_type: spi_host
+ addr_range:
+ [
+ {
+ base_addr: 0x40070000
+ size_byte: 0x1000
+ }
+ ]
+ xbar: false
+ stub: false
+ pipeline_byp: "true"
+ }
+ {
name: rv_timer
type: device
clock: clk_peri_i
@@ -8962,6 +9161,30 @@
{
struct: tl
type: req_rsp
+ name: tl_spi_host0
+ act: req
+ package: tlul_pkg
+ inst_name: peri
+ width: 1
+ default: ""
+ top_signame: spi_host0_tl
+ index: -1
+ }
+ {
+ struct: tl
+ type: req_rsp
+ name: tl_spi_host1
+ act: req
+ package: tlul_pkg
+ inst_name: peri
+ width: 1
+ default: ""
+ top_signame: spi_host1_tl
+ index: -1
+ }
+ {
+ struct: tl
+ type: req_rsp
name: tl_rv_timer
act: req
package: tlul_pkg
@@ -11343,27 +11566,28 @@
name: spi_device
pad:
[
- ChB[0..3]
+ ChC[0..5]
]
}
{
- name: uart0
+ name: spi_host0
pad:
[
- ChA[0..1]
+ ChB[0..5]
]
}
{
name: usbdev
pad:
[
- ChC[0..8]
+ ChA[0..8]
]
}
]
mio_modules:
[
gpio
+ uart0
uart1
uart2
uart3
@@ -11371,6 +11595,7 @@
i2c1
i2c2
pattgen
+ spi_host1
]
nc_modules:
[
@@ -11389,7 +11614,7 @@
pad:
[
{
- name: ChB
+ name: ChC
index: 0
}
]
@@ -11402,60 +11627,84 @@
pad:
[
{
+ name: ChC
+ index: 1
+ }
+ ]
+ }
+ {
+ name: spi_device_sd
+ width: 4
+ type: inout
+ module_name: spi_device
+ pad:
+ [
+ {
+ name: ChC
+ index: 2
+ }
+ {
+ name: ChC
+ index: 3
+ }
+ {
+ name: ChC
+ index: 4
+ }
+ {
+ name: ChC
+ index: 5
+ }
+ ]
+ }
+ {
+ name: spi_host0_sck
+ width: 1
+ type: output
+ module_name: spi_host0
+ pad:
+ [
+ {
+ name: ChB
+ index: 0
+ }
+ ]
+ }
+ {
+ name: spi_host0_csb
+ width: 1
+ type: output
+ module_name: spi_host0
+ pad:
+ [
+ {
name: ChB
index: 1
}
]
}
{
- name: spi_device_sdi
- width: 1
- type: input
- module_name: spi_device
+ name: spi_host0_sd
+ width: 4
+ type: inout
+ module_name: spi_host0
pad:
[
{
name: ChB
index: 2
}
- ]
- }
- {
- name: spi_device_sdo
- width: 1
- type: output
- module_name: spi_device
- pad:
- [
{
name: ChB
index: 3
}
- ]
- }
- {
- name: uart0_rx
- width: 1
- type: input
- module_name: uart0
- pad:
- [
{
- name: ChA
- index: 0
+ name: ChB
+ index: 4
}
- ]
- }
- {
- name: uart0_tx
- width: 1
- type: output
- module_name: uart0
- pad:
- [
{
- name: ChA
- index: 1
+ name: ChB
+ index: 5
}
]
}
@@ -11467,7 +11716,7 @@
pad:
[
{
- name: ChC
+ name: ChA
index: 0
}
]
@@ -11480,7 +11729,7 @@
pad:
[
{
- name: ChC
+ name: ChA
index: 1
}
]
@@ -11493,7 +11742,7 @@
pad:
[
{
- name: ChC
+ name: ChA
index: 2
}
]
@@ -11506,7 +11755,7 @@
pad:
[
{
- name: ChC
+ name: ChA
index: 3
}
]
@@ -11519,7 +11768,7 @@
pad:
[
{
- name: ChC
+ name: ChA
index: 4
}
]
@@ -11532,7 +11781,7 @@
pad:
[
{
- name: ChC
+ name: ChA
index: 5
}
]
@@ -11545,7 +11794,7 @@
pad:
[
{
- name: ChC
+ name: ChA
index: 6
}
]
@@ -11558,7 +11807,7 @@
pad:
[
{
- name: ChC
+ name: ChA
index: 7
}
]
@@ -11571,7 +11820,7 @@
pad:
[
{
- name: ChC
+ name: ChA
index: 8
}
]
@@ -11580,6 +11829,12 @@
inputs:
[
{
+ name: uart0_rx
+ width: 1
+ type: input
+ module_name: uart0
+ }
+ {
name: uart1_rx
width: 1
type: input
@@ -11601,6 +11856,12 @@
outputs:
[
{
+ name: uart0_tx
+ width: 1
+ type: output
+ module_name: uart0
+ }
+ {
name: uart1_tx
width: 1
type: output
@@ -11642,6 +11903,18 @@
type: output
module_name: pattgen
}
+ {
+ name: spi_host1_sck
+ width: 1
+ type: output
+ module_name: spi_host1
+ }
+ {
+ name: spi_host1_csb
+ width: 1
+ type: output
+ module_name: spi_host1
+ }
]
inouts:
[
@@ -11687,6 +11960,12 @@
type: inout
module_name: i2c2
}
+ {
+ name: spi_host1_sd
+ width: 4
+ type: inout
+ module_name: spi_host1
+ }
]
}
padctrl:
@@ -11807,6 +12086,8 @@
sys_io_div4: rstmgr_aon_resets.rst_sys_io_div4_n
sys_aon: rstmgr_aon_resets.rst_sys_aon_n
spi_device: rstmgr_aon_resets.rst_spi_device_n
+ spi_host0: rstmgr_aon_resets.rst_spi_host0_n
+ spi_host1: rstmgr_aon_resets.rst_spi_host1_n
usb: rstmgr_aon_resets.rst_usb_n
i2c0: rstmgr_aon_resets.rst_i2c0_n
i2c1: rstmgr_aon_resets.rst_i2c1_n
@@ -11900,6 +12181,32 @@
type: req_rsp
act: rsp
name: tl
+ inst_name: spi_host0
+ width: 1
+ default: ""
+ end_idx: -1
+ top_signame: spi_host0_tl
+ index: -1
+ }
+ {
+ struct: tl
+ package: tlul_pkg
+ type: req_rsp
+ act: rsp
+ name: tl
+ inst_name: spi_host1
+ width: 1
+ default: ""
+ end_idx: -1
+ top_signame: spi_host1_tl
+ index: -1
+ }
+ {
+ struct: tl
+ package: tlul_pkg
+ type: req_rsp
+ act: rsp
+ name: tl
inst_name: i2c0
width: 1
default: ""
@@ -14749,6 +15056,30 @@
{
struct: tl
type: req_rsp
+ name: tl_spi_host0
+ act: req
+ package: tlul_pkg
+ inst_name: peri
+ width: 1
+ default: ""
+ top_signame: spi_host0_tl
+ index: -1
+ }
+ {
+ struct: tl
+ type: req_rsp
+ name: tl_spi_host1
+ act: req
+ package: tlul_pkg
+ inst_name: peri
+ width: 1
+ default: ""
+ top_signame: spi_host1_tl
+ index: -1
+ }
+ {
+ struct: tl
+ type: req_rsp
name: tl_rv_timer
act: req
package: tlul_pkg
@@ -16636,6 +16967,50 @@
{
package: tlul_pkg
struct: tl_h2d
+ signame: spi_host0_tl_req
+ width: 1
+ type: req_rsp
+ end_idx: -1
+ act: rsp
+ suffix: req
+ default: ""
+ }
+ {
+ package: tlul_pkg
+ struct: tl_d2h
+ signame: spi_host0_tl_rsp
+ width: 1
+ type: req_rsp
+ end_idx: -1
+ act: rsp
+ suffix: rsp
+ default: ""
+ }
+ {
+ package: tlul_pkg
+ struct: tl_h2d
+ signame: spi_host1_tl_req
+ width: 1
+ type: req_rsp
+ end_idx: -1
+ act: rsp
+ suffix: req
+ default: ""
+ }
+ {
+ package: tlul_pkg
+ struct: tl_d2h
+ signame: spi_host1_tl_rsp
+ width: 1
+ type: req_rsp
+ end_idx: -1
+ act: rsp
+ suffix: rsp
+ default: ""
+ }
+ {
+ package: tlul_pkg
+ struct: tl_h2d
signame: rv_timer_tl_req
width: 1
type: req_rsp
diff --git a/hw/top_earlgrey/data/top_earlgrey.hjson b/hw/top_earlgrey/data/top_earlgrey.hjson
index a5595cf..bc4adb6 100644
--- a/hw/top_earlgrey/data/top_earlgrey.hjson
+++ b/hw/top_earlgrey/data/top_earlgrey.hjson
@@ -155,6 +155,8 @@
{ name: "sys_io_div4", gen: true, type: "top", domains: ["Aon", "0"], parent: "sys_src", clk: "io_div4" }
{ name: "sys_aon", gen: true, type: "top", domains: ["Aon", "0"], parent: "sys_src", clk: "aon" }
{ name: "spi_device", gen: true, type: "top", domains: [ "0"], parent: "sys_src", clk: "io_div2", sw: 1 }
+ { name: "spi_host0", gen: true, type: "top", domains: [ "0"], parent: "sys_src", clk: "io_div2", sw: 1 }
+ { name: "spi_host1", gen: true, type: "top", domains: [ "0"], parent: "sys_src", clk: "io_div2", sw: 1 }
{ name: "usb", gen: true, type: "top", domains: [ "0"], parent: "sys_src", clk: "usb", sw: 1 }
{ name: "i2c0", gen: true, type: "top", domains: [ "0"], parent: "sys_src", clk: "io_div2", sw: 1 },
{ name: "i2c1", gen: true, type: "top", domains: [ "0"], parent: "sys_src", clk: "io_div2", sw: 1 },
@@ -278,6 +280,20 @@
reset_connections: {rst_ni: "spi_device"},
base_addr: "0x40050000",
},
+ { name: "spi_host0",
+ type: "spi_host",
+ clock_srcs: {clk_i: "io_div4"},
+ clock_group: "peri",
+ reset_connections: {rst_ni: "spi_host0"},
+ base_addr: "0x40060000",
+ },
+ { name: "spi_host1",
+ type: "spi_host",
+ clock_srcs: {clk_i: "io_div4"},
+ clock_group: "peri",
+ reset_connections: {rst_ni: "spi_host1"},
+ base_addr: "0x40070000",
+ },
{ name: "i2c0",
type: "i2c",
clock_srcs: {clk_i: "io_div4"},
@@ -869,11 +885,9 @@
// Dedicated IO modules. The in/out ports of the modules below are connected
// to TOP IO port through PADS directly. It bypasses PINMUX multiplexers
dio_modules: [
- { name: "spi_device", pad: ["ChB[0..3]"] },
- //{ name: "uart.tx", pad: ["ChA[0]"]},
- { name: "uart0", pad: ["ChA[0..1]"]},
- // { name: "dio_module.signal_input", pad: ["ChA[31]"] }
- { name: "usbdev", pad: ["ChC[0..8]"]},
+ { name: "spi_device", pad: ["ChC[0..5]"] },
+ { name: "spi_host0", pad: ["ChB[0..5]"] },
+ { name: "usbdev", pad: ["ChA[0..8]"] },
],
// Multiplexing IO modules. The in/out ports of the modules below are
@@ -881,8 +895,8 @@
// between the modules and the IO PADS.
// If `mio_modules` aren't defined, it uses all remaining modules from
// module list except defined in `dio_modules`.
- mio_modules: ["gpio", "uart1", "uart2", "uart3",
- "i2c0", "i2c1", "i2c2", "pattgen"]
+ mio_modules: ["gpio", "uart0", "uart1", "uart2", "uart3",
+ "i2c0", "i2c1", "i2c2", "pattgen", "spi_host1"]
// If any module isn't defined in above two lists, its inputs will be tied
// to 0, and the output/OE signals will be floating (or connected to
diff --git a/hw/top_earlgrey/data/top_earlgrey.sv.tpl b/hw/top_earlgrey/data/top_earlgrey.sv.tpl
index 779d5f4..a5f9ebb 100644
--- a/hw/top_earlgrey/data/top_earlgrey.sv.tpl
+++ b/hw/top_earlgrey/data/top_earlgrey.sv.tpl
@@ -733,32 +733,64 @@
% if num_dio != 0:
// Dedicated IO connections
// Input-only DIOs have no d2p signals
- assign dio_d2p = {
+ assign dio_d2p = {<% vector_idx = num_dio - 1 %>
% for sig in top["pinmux"]["dio"]:
% if sig["type"] in ["output", "inout"]:
- cio_${sig["name"]}_d2p${"" if loop.last else ","} // DIO${num_dio - 1 - loop.index}
+ % if sig["width"] > 1:
+ % for i in range(sig["width"]-1,-1,-1):
+ cio_${sig["name"]}_d2p[${i}]${"" if vector_idx - sig["width"] + 1 == 0 else ","} // DIO${vector_idx}<% vector_idx -= 1 %>
+ % endfor
+ % else:
+ cio_${sig["name"]}_d2p${"" if vector_idx == 0 else ","} // DIO${vector_idx}<% vector_idx -= 1 %>
+ % endif
% else:
- ${sig["width"]}'b0${"" if loop.last else ","} // DIO${num_dio - 1 - loop.index}: cio_${sig["name"]}
+ % if sig["width"] > 1:
+ ${sig["width"]}'b0${"" if vector_idx - sig["width"] + 1 == 0 else ","} // DIO${vector_idx} - DIO${vector_idx-sig["width"] + 1}: cio_${sig["name"]}<% vector_idx -= sig["width"] %>
+ % else:
+ ${sig["width"]}'b0${"" if vector_idx == 0 else ","} // DIO${vector_idx}: cio_${sig["name"]}<% vector_idx -= 1 %>
+ % endif
% endif
% endfor
};
- assign dio_d2p_en = {
+ assign dio_d2p_en = {<% vector_idx = num_dio - 1 %>
% for sig in top["pinmux"]["dio"]:
% if sig["type"] in ["output", "inout"]:
- cio_${sig["name"]}_en_d2p${"" if loop.last else ","} // DIO${num_dio - 1 - loop.index}
+ % if sig["width"] > 1:
+ % for i in range(sig["width"]-1,-1,-1):
+ cio_${sig["name"]}_en_d2p[${i}]${"" if vector_idx - sig["width"] + 1 == 0 else ","} // DIO${vector_idx}<% vector_idx -= 1 %>
+ % endfor
+ % else:
+ cio_${sig["name"]}_en_d2p${"" if vector_idx == 0 else ","} // DIO${vector_idx}<% vector_idx -= 1 %>
+ % endif
% else:
- ${sig["width"]}'b0${"" if loop.last else ","} // DIO${num_dio - 1 - loop.index}: cio_${sig["name"]}
+ % if sig["width"] > 1:
+ ${sig["width"]}'b0${"" if vector_idx - sig["width"] + 1 == 0 else ","} // DIO${vector_idx} - DIO${vector_idx-sig["width"] + 1}: cio_${sig["name"]}<% vector_idx -= sig["width"] %>
+ % else:
+ ${sig["width"]}'b0${"" if vector_idx == 0 else ","} // DIO${vector_idx}: cio_${sig["name"]}<% vector_idx -= 1 %>
+ % endif
% endif
% endfor
};
- // Output-only DIOs have no p2d signal
+ // Output-only DIOs have no p2d signal<% vector_idx = num_dio - 1 %>
% for sig in top["pinmux"]["dio"]:
% if sig["type"] in ["input", "inout"]:
- assign cio_${sig["name"]}_p2d${" " * (max_diolength - len(sig["name"]))} = dio_p2d[${num_dio - 1 - loop.index}]; // DIO${num_dio - 1 - loop.index}
+ % if sig["width"] > 1:
+ % for i in range(sig["width"]-1,-1,-1):
+ assign cio_${sig["name"]}_p2d[${i}]${" " * (max_diolength - len(str(i)) - 2 - len(sig["name"]))} = dio_p2d[${vector_idx}]; // DIO${vector_idx}<% vector_idx -= 1 %>
+ % endfor
+ % else:
+ assign cio_${sig["name"]}_p2d${" " * (max_diolength - len(sig["name"]))} = dio_p2d[${vector_idx}]; // DIO${vector_idx}<% vector_idx -= 1 %>
+ % endif
% else:
- // DIO${num_dio - 1 - loop.index}: cio_${sig["name"]}
+ % if sig["width"] > 1:
+ % for i in range(sig["width"]-1,-1,-1):
+ // DIO${vector_idx}: cio_${sig["name"]}[${i}] // DIO${vector_idx}<% vector_idx -= 1 %>
+ % endfor
+ % else:
+ // DIO${vector_idx}: cio_${sig["name"]} // DIO${vector_idx}<% vector_idx -= 1 %>
+ % endif
% endif
% endfor
% endif
diff --git a/hw/top_earlgrey/data/xbar_peri.hjson b/hw/top_earlgrey/data/xbar_peri.hjson
index ee57b0e..2141bae 100644
--- a/hw/top_earlgrey/data/xbar_peri.hjson
+++ b/hw/top_earlgrey/data/xbar_peri.hjson
@@ -75,6 +75,18 @@
reset: "rst_peri_ni",
pipeline: "false"
},
+ { name: "spi_host0",
+ type: "device",
+ clock: "clk_peri_i",
+ reset: "rst_peri_ni",
+ pipeline: "false"
+ },
+ { name: "spi_host1",
+ type: "device",
+ clock: "clk_peri_i",
+ reset: "rst_peri_ni",
+ pipeline: "false"
+ },
{ name: "rv_timer",
type: "device",
clock: "clk_peri_i",
@@ -172,8 +184,9 @@
],
connections: {
main: ["uart0", "uart1", "uart2", "uart3", "i2c0", "i2c1", "i2c2", "pattgen",
- "gpio", "spi_device", "rv_timer", "usbdev", "pwrmgr_aon", "rstmgr_aon", "clkmgr_aon",
- "pinmux_aon", "ram_ret_aon", "otp_ctrl", "lc_ctrl", "sensor_ctrl_aon",
- "alert_handler", "nmi_gen", "ast_wrapper", "sram_ctrl_ret_aon"],
+ "gpio", "spi_device", "spi_host0", "spi_host1", "rv_timer", "usbdev",
+ "pwrmgr_aon", "rstmgr_aon", "clkmgr_aon", "pinmux_aon", "ram_ret_aon",
+ "otp_ctrl", "lc_ctrl", "sensor_ctrl_aon", "alert_handler", "ast_wrapper",
+ "sram_ctrl_ret_aon", "nmi_gen"],
},
}
