[dv] Cleanup lint warnings in generated RAL package

The violation is due to package name not matching file name. THis is
unfortunately the case in chip level where RAL abstractions for each IP
are placed in their own respective packages in the same file.

Signed-off-by: Srikrishna Iyer <sriyer@google.com>

util/reggen/uvm_reg.sv.tpl

diff --git a/util/reggen/uvm_reg.sv.tpl b/util/reggen/uvm_reg.sv.tpl
index 339324b..ad1d730 100644
--- a/util/reggen/uvm_reg.sv.tpl
+++ b/util/reggen/uvm_reg.sv.tpl
@@ -272,4 +272,8 @@
 
 endpackage\
 </%def>\
+
+// verilog_lint: waive-start package-filename
 ${construct_classes(block)}
+
+// verilog_lint: waive-stop package-filename