[csrng/rtl] added fatal alert Also changed all sync fifos to use the full_o. Force fatal error register added. Re-ran the top level interconnection script. Connect new alert to alert handler at the top level. Fixed some of the error reporting logic. Updated the fifo intr to be a fatal interrupt. Updated the csrng tb to stub intial io values. Changed the fatal interrupt name to be more consistant with others. Changed register name to err_code_test, and read-only. Re-ran top level make. Signed-off-by: Mark Branstad <mark.branstad@wdc.com>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
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