blob: f40c9a174fade1cc2e3b65a703f04d54f8ce0472 [file] [log] [blame]
diff --git a/sw/device/lib/pinmux.c b/sw/device/lib/pinmux.c
index 8861f54ba..8442bb896 100644
--- a/sw/device/lib/pinmux.c
+++ b/sw/device/lib/pinmux.c
@@ -60,24 +60,4 @@ void pinmux_init(void) {
reg_offset = kTopEarlgreyPinmuxMioOutIoc4 << 2;
mask = PINMUX_MIO_OUTSEL_0_OUT_0_MASK;
mmio_region_write32(reg32, reg_offset, reg_value & mask);
-
- // Configure UART1 RX input to connect to MIO pad IOC8
- reg32 = mmio_region_from_addr(PINMUX0_BASE_ADDR +
- PINMUX_MIO_PERIPH_INSEL_0_REG_OFFSET);
- reg_value = kTopEarlgreyPinmuxInselIoc8;
- // We've got one insel configuration field per register. Hence, we have to
- // convert the enumeration index into a byte address using << 2.
- reg_offset = kTopEarlgreyPinmuxPeripheralInUart1Rx << 2;
- mask = PINMUX_MIO_PERIPH_INSEL_0_IN_0_MASK;
- mmio_region_write32(reg32, reg_offset, reg_value & mask);
-
- // Configure UART1 TX output to connect to MIO pad IOC9
- reg32 =
- mmio_region_from_addr(PINMUX0_BASE_ADDR + PINMUX_MIO_OUTSEL_0_REG_OFFSET);
- reg_value = kTopEarlgreyPinmuxOutselUart1Tx;
- // We've got one insel configuration field per register. Hence, we have to
- // convert the enumeration index into a byte address using << 2.
- reg_offset = kTopEarlgreyPinmuxMioOutIoc9 << 2;
- mask = PINMUX_MIO_OUTSEL_0_OUT_0_MASK;
- mmio_region_write32(reg32, reg_offset, reg_value & mask);
}
diff --git a/sw/device/lib/testing/test_rom/test_rom_start.S b/sw/device/lib/testing/test_rom/test_rom_start.S
index e4b14eb84..d595aa757 100644
--- a/sw/device/lib/testing/test_rom/test_rom_start.S
+++ b/sw/device/lib/testing/test_rom/test_rom_start.S
@@ -81,19 +81,6 @@ _reset_start:
_start:
.globl _start
- // Enable entropy complex - this is not the full enable
- li a0, TOP_EARLGREY_ENTROPY_SRC_BASE_ADDR
- li t0, 0x55505a
- sw t0, ENTROPY_SRC_CONF_REG_OFFSET(a0)
-
- li a0, TOP_EARLGREY_CSRNG_BASE_ADDR
- li t0, 0xaaa
- sw t0, CSRNG_CTRL_REG_OFFSET(a0)
-
- li a0, TOP_EARLGREY_EDN0_BASE_ADDR
- li t0, 0x55aa
- sw t0, EDN_CTRL_REG_OFFSET(a0)
-
// Zero out the `.bss` segment.
la a0, _bss_start
la a1, _bss_end
diff --git a/sw/device/sca/aes_serial.c b/sw/device/sca/aes_serial.c
index 5dc1286af..1e2dced96 100644
--- a/sw/device/sca/aes_serial.c
+++ b/sw/device/sca/aes_serial.c
@@ -198,18 +198,13 @@ int main(void) {
sca_init(kScaTriggerSourceAes, kScaPeripheralAes);
sca_get_uart(&uart1);
- LOG_INFO("Running AES serial");
-
- LOG_INFO("Initializing simple serial interface to capture board.");
simple_serial_init(uart1);
simple_serial_register_handler('k', aes_serial_set_key);
simple_serial_register_handler('p', aes_serial_single_encrypt);
simple_serial_register_handler('b', aes_serial_batch_encrypt);
- LOG_INFO("Initializing AES unit.");
init_aes();
- LOG_INFO("Starting simple serial packet handling.");
while (true) {
simple_serial_process_packet();
}
diff --git a/sw/device/sca/lib/meson.build b/sw/device/sca/lib/meson.build
index c4a65f7e0..3f6ee67f1 100644
--- a/sw/device/sca/lib/meson.build
+++ b/sw/device/sca/lib/meson.build
@@ -17,8 +17,6 @@ sw_sca_lib_sca = declare_dependency(
sw_lib_dif_gpio,
sw_lib_dif_rv_timer,
sw_lib_dif_uart,
- sw_lib_dif_csrng,
- sw_lib_dif_edn,
sw_lib_irq,
sw_lib_testing_ottf_isrs,
sw_lib_mmio,
diff --git a/sw/device/sca/lib/sca.c b/sw/device/sca/lib/sca.c
index 3c0c86f26..7354aa9cb 100644
--- a/sw/device/sca/lib/sca.c
+++ b/sw/device/sca/lib/sca.c
@@ -7,8 +7,6 @@
#include "sw/device/lib/arch/device.h"
#include "sw/device/lib/base/bitfield.h"
#include "sw/device/lib/dif/dif_clkmgr.h"
-#include "sw/device/lib/dif/dif_csrng.h"
-#include "sw/device/lib/dif/dif_edn.h"
#include "sw/device/lib/dif/dif_entropy_src.h"
#include "sw/device/lib/dif/dif_gpio.h"
#include "sw/device/lib/dif/dif_rv_timer.h"
@@ -58,13 +56,9 @@ enum {
kRvTimerHart = kTopEarlgreyPlicTargetIbex0,
};
-static dif_uart_t uart0;
static dif_uart_t uart1;
static dif_gpio_t gpio;
static dif_rv_timer_t timer;
-static dif_csrng_t csrng;
-static dif_edn_t edn0;
-static dif_edn_t edn1;
// TODO(alphan): Handle return values as long as they don't affect capture rate.
@@ -80,13 +74,9 @@ static void sca_init_uart(void) {
};
IGNORE_RESULT(dif_uart_init(
- mmio_region_from_addr(TOP_EARLGREY_UART0_BASE_ADDR), &uart0));
- IGNORE_RESULT(dif_uart_configure(&uart0, uart_config));
- base_uart_stdout(&uart0);
-
- IGNORE_RESULT(dif_uart_init(
- mmio_region_from_addr(TOP_EARLGREY_UART1_BASE_ADDR), &uart1));
+ mmio_region_from_addr(TOP_EARLGREY_UART0_BASE_ADDR), &uart1));
IGNORE_RESULT(dif_uart_configure(&uart1, uart_config));
+ base_uart_stdout(&uart1);
}
/**
@@ -127,25 +117,6 @@ static void sca_init_timer(void) {
irq_global_ctrl(true);
}
-/**
- * Initializes the CSRNG handle.
- */
-static void sca_init_csrng(void) {
- IGNORE_RESULT(dif_csrng_init(
- mmio_region_from_addr(TOP_EARLGREY_CSRNG_BASE_ADDR), &csrng));
-}
-
-/**
- * Initializes the EDN handle.
- */
-static void sca_init_edn(void) {
- IGNORE_RESULT(
- dif_edn_init(mmio_region_from_addr(TOP_EARLGREY_EDN0_BASE_ADDR), &edn0));
-
- IGNORE_RESULT(
- dif_edn_init(mmio_region_from_addr(TOP_EARLGREY_EDN1_BASE_ADDR), &edn1));
-}
-
/**
* Override default Timer ISR.
*
@@ -172,20 +143,6 @@ void ottf_timer_isr(void) {
* @param disable Set of peripherals to disable.
*/
void sca_disable_peripherals(sca_peripherals_t disable) {
- if (disable & kScaPeripheralEdn) {
- IGNORE_RESULT(dif_edn_stop(&edn0));
- IGNORE_RESULT(dif_edn_stop(&edn1));
- }
- if (disable & kScaPeripheralCsrng) {
- IGNORE_RESULT(dif_csrng_stop(&csrng));
- }
- if (disable & kScaPeripheralEntropy) {
- dif_entropy_src_t entropy;
- IGNORE_RESULT(dif_entropy_src_init(
- mmio_region_from_addr(TOP_EARLGREY_ENTROPY_SRC_BASE_ADDR), &entropy));
- IGNORE_RESULT(dif_entropy_src_disable(&entropy));
- }
-
// Disable HMAC, KMAC, OTBN and USB clocks through CLKMGR DIF.
dif_clkmgr_t clkmgr;
IGNORE_RESULT(dif_clkmgr_init(
@@ -199,17 +156,6 @@ void sca_disable_peripherals(sca_peripherals_t disable) {
IGNORE_RESULT(dif_clkmgr_hintable_clock_set_hint(
&clkmgr, CLKMGR_CLK_HINTS_CLK_MAIN_HMAC_HINT_BIT, kDifToggleDisabled));
}
- if (disable & kScaPeripheralKmac) {
- IGNORE_RESULT(dif_clkmgr_hintable_clock_set_hint(
- &clkmgr, CLKMGR_CLK_HINTS_CLK_MAIN_KMAC_HINT_BIT, kDifToggleDisabled));
- }
- if (disable & kScaPeripheralOtbn) {
- IGNORE_RESULT(dif_clkmgr_hintable_clock_set_hint(
- &clkmgr, CLKMGR_CLK_HINTS_CLK_IO_DIV4_OTBN_HINT_BIT,
- kDifToggleDisabled));
- IGNORE_RESULT(dif_clkmgr_hintable_clock_set_hint(
- &clkmgr, CLKMGR_CLK_HINTS_CLK_MAIN_OTBN_HINT_BIT, kDifToggleDisabled));
- }
if (disable & kScaPeripheralUsb) {
IGNORE_RESULT(dif_clkmgr_gateable_clock_set_enabled(
&clkmgr, CLKMGR_CLK_ENABLES_CLK_USB_PERI_EN_BIT, kDifToggleDisabled));
@@ -221,8 +167,6 @@ void sca_init(sca_trigger_source_t trigger, sca_peripherals_t enable) {
sca_init_uart();
sca_init_gpio(trigger);
sca_init_timer();
- sca_init_csrng();
- sca_init_edn();
sca_disable_peripherals(~enable);
}
diff --git a/sw/device/tests/aes_smoketest.c b/sw/device/tests/aes_smoketest.c
index ab6596ff5..2b6ee4a9a 100644
--- a/sw/device/tests/aes_smoketest.c
+++ b/sw/device/tests/aes_smoketest.c
@@ -7,7 +7,6 @@
#include "sw/device/lib/dif/dif_aes.h"
#include "sw/device/lib/runtime/log.h"
#include "sw/device/lib/testing/check.h"
-#include "sw/device/lib/testing/entropy_testutils.h"
#include "sw/device/lib/testing/test_framework/ottf.h"
#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
@@ -66,9 +65,6 @@ bool test_main(void) {
LOG_INFO("Running AES test");
- // First of all, we need to get the entropy complex up and running.
- entropy_testutils_boot_mode_init();
-
// Initialise AES.
CHECK_DIF_OK(
dif_aes_init(mmio_region_from_addr(TOP_EARLGREY_AES_BASE_ADDR), &aes));
diff --git a/sw/device/tests/meson.build b/sw/device/tests/meson.build
index 4ad73f695..f87b0779c 100644
--- a/sw/device/tests/meson.build
+++ b/sw/device/tests/meson.build
@@ -245,7 +245,6 @@ aes_smoketest_lib = declare_dependency(
sw_lib_dif_aes,
sw_lib_mmio,
sw_lib_runtime_log,
- sw_lib_testing_entropy_testutils,
sw_lib_testing_test_status,
],
),