blob: 03efc1c0d0e5322f8017a2734e1771754fb17a46 [file] [log] [blame]
// Copyright lowRISC contributors.
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0
#include <iostream>
#include "verilated_toplevel.h"
#include "verilator_sim_ctrl.h"
int main(int argc, char **argv) {
top_earlgrey_verilator top;
VerilatorSimCtrl &simctrl = VerilatorSimCtrl::GetInstance();
simctrl.SetTop(&top, &top.clk_i, &top.rst_ni,
VerilatorSimCtrlFlags::ResetPolarityNegative);
simctrl.RegisterMemoryArea(
"rom",
"TOP.top_earlgrey_verilator.top_earlgrey.u_rom_rom.gen_mem_generic."
"u_impl_generic");
simctrl.RegisterMemoryArea(
"ram",
"TOP.top_earlgrey_verilator.top_earlgrey.u_ram1p_ram_main"
".gen_mem_generic.u_impl_generic");
simctrl.RegisterMemoryArea(
"flash",
"TOP.top_earlgrey_verilator.top_earlgrey.u_flash_eflash."
"gen_flash_banks[0].u_flash.gen_flash.u_impl_generic.u_mem.gen_mem_"
"generic.u_impl_"
"generic");
std::cout << "Simulation of OpenTitan Earl Grey" << std::endl
<< "=================================" << std::endl
<< std::endl;
return simctrl.Exec(argc, argv);
}