| // Copyright lowRISC contributors. |
| // Licensed under the Apache License, Version 2.0, see LICENSE for details. |
| // SPDX-License-Identifier: Apache-2.0 |
| // |
| // Register Package auto-generated by `reggen` containing data structure |
| |
| package hmac_reg_pkg; |
| |
| // Param list |
| localparam int NumWords = 8; |
| |
| //////////////////////////// |
| // Typedefs for registers // |
| //////////////////////////// |
| typedef struct packed { |
| struct packed { |
| logic q; |
| } hmac_done; |
| struct packed { |
| logic q; |
| } fifo_full; |
| struct packed { |
| logic q; |
| } hmac_err; |
| } hmac_reg2hw_intr_state_reg_t; |
| |
| typedef struct packed { |
| struct packed { |
| logic q; |
| } hmac_done; |
| struct packed { |
| logic q; |
| } fifo_full; |
| struct packed { |
| logic q; |
| } hmac_err; |
| } hmac_reg2hw_intr_enable_reg_t; |
| |
| typedef struct packed { |
| struct packed { |
| logic q; |
| logic qe; |
| } hmac_done; |
| struct packed { |
| logic q; |
| logic qe; |
| } fifo_full; |
| struct packed { |
| logic q; |
| logic qe; |
| } hmac_err; |
| } hmac_reg2hw_intr_test_reg_t; |
| |
| typedef struct packed { |
| struct packed { |
| logic q; |
| } hmac_en; |
| struct packed { |
| logic q; |
| } sha_en; |
| struct packed { |
| logic q; |
| } endian_swap; |
| struct packed { |
| logic q; |
| } digest_swap; |
| } hmac_reg2hw_cfg_reg_t; |
| |
| typedef struct packed { |
| struct packed { |
| logic q; |
| logic qe; |
| } hash_start; |
| struct packed { |
| logic q; |
| logic qe; |
| } hash_process; |
| } hmac_reg2hw_cmd_reg_t; |
| |
| typedef struct packed { |
| logic [31:0] q; |
| logic qe; |
| } hmac_reg2hw_wipe_secret_reg_t; |
| |
| typedef struct packed { |
| logic [31:0] q; |
| } hmac_reg2hw_key_mreg_t; |
| |
| |
| typedef struct packed { |
| struct packed { |
| logic d; |
| logic de; |
| } hmac_done; |
| struct packed { |
| logic d; |
| logic de; |
| } fifo_full; |
| struct packed { |
| logic d; |
| logic de; |
| } hmac_err; |
| } hmac_hw2reg_intr_state_reg_t; |
| |
| typedef struct packed { |
| struct packed { |
| logic d; |
| } fifo_empty; |
| struct packed { |
| logic d; |
| } fifo_full; |
| struct packed { |
| logic [4:0] d; |
| } fifo_depth; |
| } hmac_hw2reg_status_reg_t; |
| |
| typedef struct packed { |
| logic [31:0] d; |
| logic de; |
| } hmac_hw2reg_err_code_reg_t; |
| |
| typedef struct packed { |
| logic [31:0] d; |
| logic de; |
| } hmac_hw2reg_key_mreg_t; |
| |
| typedef struct packed { |
| logic [31:0] d; |
| } hmac_hw2reg_digest_mreg_t; |
| |
| typedef struct packed { |
| logic [31:0] d; |
| logic de; |
| } hmac_hw2reg_msg_length_lower_reg_t; |
| |
| typedef struct packed { |
| logic [31:0] d; |
| logic de; |
| } hmac_hw2reg_msg_length_upper_reg_t; |
| |
| |
| /////////////////////////////////////// |
| // Register to internal design logic // |
| /////////////////////////////////////// |
| typedef struct packed { |
| hmac_reg2hw_intr_state_reg_t intr_state; // [308:306] |
| hmac_reg2hw_intr_enable_reg_t intr_enable; // [305:303] |
| hmac_reg2hw_intr_test_reg_t intr_test; // [302:297] |
| hmac_reg2hw_cfg_reg_t cfg; // [296:293] |
| hmac_reg2hw_cmd_reg_t cmd; // [292:289] |
| hmac_reg2hw_wipe_secret_reg_t wipe_secret; // [288:256] |
| hmac_reg2hw_key_mreg_t [7:0] key; // [255:0] |
| } hmac_reg2hw_t; |
| |
| /////////////////////////////////////// |
| // Internal design logic to register // |
| /////////////////////////////////////// |
| typedef struct packed { |
| hmac_hw2reg_intr_state_reg_t intr_state; // [631:629] |
| hmac_hw2reg_status_reg_t status; // [628:629] |
| hmac_hw2reg_err_code_reg_t err_code; // [628:629] |
| hmac_hw2reg_key_mreg_t [7:0] key; // [628:365] |
| hmac_hw2reg_digest_mreg_t [7:0] digest; // [364:109] |
| hmac_hw2reg_msg_length_lower_reg_t msg_length_lower; // [108:109] |
| hmac_hw2reg_msg_length_upper_reg_t msg_length_upper; // [108:109] |
| } hmac_hw2reg_t; |
| |
| // Register Address |
| parameter HMAC_INTR_STATE_OFFSET = 12'h 0; |
| parameter HMAC_INTR_ENABLE_OFFSET = 12'h 4; |
| parameter HMAC_INTR_TEST_OFFSET = 12'h 8; |
| parameter HMAC_CFG_OFFSET = 12'h c; |
| parameter HMAC_CMD_OFFSET = 12'h 10; |
| parameter HMAC_STATUS_OFFSET = 12'h 14; |
| parameter HMAC_ERR_CODE_OFFSET = 12'h 18; |
| parameter HMAC_WIPE_SECRET_OFFSET = 12'h 1c; |
| parameter HMAC_KEY0_OFFSET = 12'h 20; |
| parameter HMAC_KEY1_OFFSET = 12'h 24; |
| parameter HMAC_KEY2_OFFSET = 12'h 28; |
| parameter HMAC_KEY3_OFFSET = 12'h 2c; |
| parameter HMAC_KEY4_OFFSET = 12'h 30; |
| parameter HMAC_KEY5_OFFSET = 12'h 34; |
| parameter HMAC_KEY6_OFFSET = 12'h 38; |
| parameter HMAC_KEY7_OFFSET = 12'h 3c; |
| parameter HMAC_DIGEST0_OFFSET = 12'h 40; |
| parameter HMAC_DIGEST1_OFFSET = 12'h 44; |
| parameter HMAC_DIGEST2_OFFSET = 12'h 48; |
| parameter HMAC_DIGEST3_OFFSET = 12'h 4c; |
| parameter HMAC_DIGEST4_OFFSET = 12'h 50; |
| parameter HMAC_DIGEST5_OFFSET = 12'h 54; |
| parameter HMAC_DIGEST6_OFFSET = 12'h 58; |
| parameter HMAC_DIGEST7_OFFSET = 12'h 5c; |
| parameter HMAC_MSG_LENGTH_LOWER_OFFSET = 12'h 60; |
| parameter HMAC_MSG_LENGTH_UPPER_OFFSET = 12'h 64; |
| |
| // Window parameter |
| parameter HMAC_MSG_FIFO_OFFSET = 12'h 800; |
| parameter HMAC_MSG_FIFO_SIZE = 12'h 800; |
| |
| // Register Index |
| typedef enum int { |
| HMAC_INTR_STATE, |
| HMAC_INTR_ENABLE, |
| HMAC_INTR_TEST, |
| HMAC_CFG, |
| HMAC_CMD, |
| HMAC_STATUS, |
| HMAC_ERR_CODE, |
| HMAC_WIPE_SECRET, |
| HMAC_KEY0, |
| HMAC_KEY1, |
| HMAC_KEY2, |
| HMAC_KEY3, |
| HMAC_KEY4, |
| HMAC_KEY5, |
| HMAC_KEY6, |
| HMAC_KEY7, |
| HMAC_DIGEST0, |
| HMAC_DIGEST1, |
| HMAC_DIGEST2, |
| HMAC_DIGEST3, |
| HMAC_DIGEST4, |
| HMAC_DIGEST5, |
| HMAC_DIGEST6, |
| HMAC_DIGEST7, |
| HMAC_MSG_LENGTH_LOWER, |
| HMAC_MSG_LENGTH_UPPER |
| } hmac_id_e; |
| |
| // Register width information to check illegal writes |
| localparam logic [3:0] HMAC_PERMIT [26] = '{ |
| 4'b 0001, // index[ 0] HMAC_INTR_STATE |
| 4'b 0001, // index[ 1] HMAC_INTR_ENABLE |
| 4'b 0001, // index[ 2] HMAC_INTR_TEST |
| 4'b 0001, // index[ 3] HMAC_CFG |
| 4'b 0001, // index[ 4] HMAC_CMD |
| 4'b 0011, // index[ 5] HMAC_STATUS |
| 4'b 1111, // index[ 6] HMAC_ERR_CODE |
| 4'b 1111, // index[ 7] HMAC_WIPE_SECRET |
| 4'b 1111, // index[ 8] HMAC_KEY0 |
| 4'b 1111, // index[ 9] HMAC_KEY1 |
| 4'b 1111, // index[10] HMAC_KEY2 |
| 4'b 1111, // index[11] HMAC_KEY3 |
| 4'b 1111, // index[12] HMAC_KEY4 |
| 4'b 1111, // index[13] HMAC_KEY5 |
| 4'b 1111, // index[14] HMAC_KEY6 |
| 4'b 1111, // index[15] HMAC_KEY7 |
| 4'b 1111, // index[16] HMAC_DIGEST0 |
| 4'b 1111, // index[17] HMAC_DIGEST1 |
| 4'b 1111, // index[18] HMAC_DIGEST2 |
| 4'b 1111, // index[19] HMAC_DIGEST3 |
| 4'b 1111, // index[20] HMAC_DIGEST4 |
| 4'b 1111, // index[21] HMAC_DIGEST5 |
| 4'b 1111, // index[22] HMAC_DIGEST6 |
| 4'b 1111, // index[23] HMAC_DIGEST7 |
| 4'b 1111, // index[24] HMAC_MSG_LENGTH_LOWER |
| 4'b 1111 // index[25] HMAC_MSG_LENGTH_UPPER |
| }; |
| endpackage |
| |
