[ibex] Connect up crash dump output Fixes #4618 Signed-off-by: Tom Roberts <tomroberts@lowrisc.org>
diff --git a/hw/ip/rstmgr/data/rstmgr.hjson b/hw/ip/rstmgr/data/rstmgr.hjson index 3e72e61..d5ab6c1 100644 --- a/hw/ip/rstmgr/data/rstmgr.hjson +++ b/hw/ip/rstmgr/data/rstmgr.hjson
@@ -80,11 +80,11 @@ package: "alert_pkg", }, - { struct: "crashdump", + { struct: "crash_dump", type: "uni", name: "cpu_dump", act: "rcv", - package: "rv_core_ibex_pkg", + package: "ibex_pkg", }, // Exported resets
diff --git a/hw/ip/rstmgr/data/rstmgr.hjson.tpl b/hw/ip/rstmgr/data/rstmgr.hjson.tpl index 9da1514..10cd5da 100644 --- a/hw/ip/rstmgr/data/rstmgr.hjson.tpl +++ b/hw/ip/rstmgr/data/rstmgr.hjson.tpl
@@ -81,11 +81,11 @@ package: "alert_pkg", }, - { struct: "crashdump", + { struct: "crash_dump", type: "uni", name: "cpu_dump", act: "rcv", - package: "rv_core_ibex_pkg", + package: "ibex_pkg", }, // Exported resets
diff --git a/hw/ip/rstmgr/data/rstmgr.sv.tpl b/hw/ip/rstmgr/data/rstmgr.sv.tpl index d4a049a..b3ab1ec 100644 --- a/hw/ip/rstmgr/data/rstmgr.sv.tpl +++ b/hw/ip/rstmgr/data/rstmgr.sv.tpl
@@ -30,7 +30,7 @@ input alert_pkg::alert_crashdump_t alert_dump_i, // Interface to cpu crash dump - input rv_core_ibex_pkg::crashdump_t cpu_dump_i, + input ibex_pkg::crash_dump_t cpu_dump_i, // dft bypass input scan_rst_ni, @@ -314,7 +314,7 @@ ); rstmgr_crash_info #( - .CrashDumpWidth($bits(rv_core_ibex_pkg::crashdump_t)) + .CrashDumpWidth($bits(ibex_pkg::crash_dump_t)) ) u_cpu_info ( .clk_i, .rst_ni,
diff --git a/hw/ip/rstmgr/rstmgr_pkg.core b/hw/ip/rstmgr/rstmgr_pkg.core index 9c5e8df..189859a 100644 --- a/hw/ip/rstmgr/rstmgr_pkg.core +++ b/hw/ip/rstmgr/rstmgr_pkg.core
@@ -12,7 +12,7 @@ - lowrisc:ip:rstmgr_reg - lowrisc:ip:alert_handler_reg - lowrisc:ip:alert_handler_component - - lowrisc:ip:rv_core_ibex_pkg + - lowrisc:ibex:ibex_pkg - "fileset_top ? (lowrisc:systems:rstmgr_pkg)" - "fileset_topgen ? (lowrisc:systems:topgen)" files:
diff --git a/hw/ip/rv_core_ibex/rtl/rv_core_ibex.sv b/hw/ip/rv_core_ibex/rtl/rv_core_ibex.sv index 44f8b0a..ed8b9a9 100644 --- a/hw/ip/rv_core_ibex/rtl/rv_core_ibex.sv +++ b/hw/ip/rv_core_ibex/rtl/rv_core_ibex.sv
@@ -8,7 +8,7 @@ * 32 bit RISC-V core supporting the RV32I + optionally EMC instruction sets. * Instruction and data bus are 32 bit wide TileLink-UL (TL-UL). */ -module rv_core_ibex import rv_core_ibex_pkg::*; #( +module rv_core_ibex #( parameter bit PMPEnable = 1'b0, parameter int unsigned PMPGranularity = 0, parameter int unsigned PMPNumRegions = 4, @@ -62,7 +62,7 @@ input logic debug_req_i, // Crash dump information - output crashdump_t crash_dump_o, + output ibex_pkg::crash_dump_t crash_dump_o, // CPU Control Signals input lc_ctrl_pkg::lc_tx_t fetch_enable_i, @@ -224,7 +224,7 @@ .irq_nm_i ( irq_nm ), .debug_req_i, - .crash_dump_o ( ), + .crash_dump_o, `ifdef RVFI .rvfi_valid, @@ -336,10 +336,6 @@ .spare_rsp_i (1'b0), .spare_rsp_o ()); - - //hardwire crashdump for now - assign crash_dump_o = '0; - // // Interception point for connecting simulation SRAM by disconnecting the tl_d output. The // disconnection is done only if `SYNTHESIS is NOT defined AND `RV_CORE_IBEX_SIM_SRAM is
diff --git a/hw/ip/rv_core_ibex/rtl/rv_core_ibex_pkg.sv b/hw/ip/rv_core_ibex/rtl/rv_core_ibex_pkg.sv deleted file mode 100644 index 1a811e0..0000000 --- a/hw/ip/rv_core_ibex/rtl/rv_core_ibex_pkg.sv +++ /dev/null
@@ -1,15 +0,0 @@ -// Copyright lowRISC contributors. -// Licensed under the Apache License, Version 2.0, see LICENSE for details. -// SPDX-License-Identifier: Apache-2.0 -// - -package rv_core_ibex_pkg; - - typedef struct packed { - logic [top_pkg::TL_AW-1:0] last_pc_fetched; - logic [top_pkg::TL_AW-1:0] last_pc_retired; - logic [top_pkg::TL_AW-1:0] last_instr_addr; - logic [top_pkg::TL_AW-1:0] last_data_addr; - } crashdump_t; - -endpackage : rv_core_ibex_pkg
diff --git a/hw/ip/rv_core_ibex/rv_core_ibex.core b/hw/ip/rv_core_ibex/rv_core_ibex.core index 7993fa3..29ab3c5 100644 --- a/hw/ip/rv_core_ibex/rv_core_ibex.core +++ b/hw/ip/rv_core_ibex/rv_core_ibex.core
@@ -14,7 +14,6 @@ - lowrisc:tlul:adapter_host - lowrisc:ip:lc_ctrl_pkg - lowrisc:prim:lc_sync - - lowrisc:ip:rv_core_ibex_pkg files: - rtl/rv_core_ibex.sv file_type: systemVerilogSource
diff --git a/hw/ip/rv_core_ibex/rv_core_ibex_pkg.core b/hw/ip/rv_core_ibex/rv_core_ibex_pkg.core deleted file mode 100644 index a2baee1..0000000 --- a/hw/ip/rv_core_ibex/rv_core_ibex_pkg.core +++ /dev/null
@@ -1,18 +0,0 @@ -CAPI=2: -# Copyright lowRISC contributors. -# Licensed under the Apache License, Version 2.0, see LICENSE for details. -# SPDX-License-Identifier: Apache-2.0 -name: "lowrisc:ip:rv_core_ibex_pkg:0.1" -description: "Package file for ibex wrapper" - -filesets: - files_rtl: - depend: - files: - - rtl/rv_core_ibex_pkg.sv - file_type: systemVerilogSource - -targets: - default: - filesets: - - files_rtl
diff --git a/hw/top_earlgrey/data/autogen/top_earlgrey.gen.hjson b/hw/top_earlgrey/data/autogen/top_earlgrey.gen.hjson index 63ff8ea..2a72ec5 100644 --- a/hw/top_earlgrey/data/autogen/top_earlgrey.gen.hjson +++ b/hw/top_earlgrey/data/autogen/top_earlgrey.gen.hjson
@@ -444,17 +444,17 @@ index: 0 } { - struct: crashdump + struct: crash_dump type: uni - name: crashdump + name: crash_dump act: req - package: rv_core_ibex_pkg + package: ibex_pkg inst_name: rv_core_ibex width: 1 default: "" end_idx: -1 top_type: broadcast - top_signame: rv_core_ibex_crashdump + top_signame: rv_core_ibex_crash_dump index: -1 } ] @@ -4178,15 +4178,15 @@ index: -1 } { - struct: crashdump + struct: crash_dump type: uni name: cpu_dump act: rcv - package: rv_core_ibex_pkg + package: ibex_pkg inst_name: rstmgr_aon width: 1 default: "" - top_signame: rv_core_ibex_crashdump + top_signame: rv_core_ibex_crash_dump index: -1 } { @@ -7798,7 +7798,7 @@ pinmux_aon.sleep_en aon_timer_aon.sleep_mode ] - rv_core_ibex.crashdump: + rv_core_ibex.crash_dump: [ rstmgr_aon.cpu_dump ] @@ -13687,15 +13687,15 @@ index: -1 } { - struct: crashdump + struct: crash_dump type: uni name: cpu_dump act: rcv - package: rv_core_ibex_pkg + package: ibex_pkg inst_name: rstmgr_aon width: 1 default: "" - top_signame: rv_core_ibex_crashdump + top_signame: rv_core_ibex_crash_dump index: -1 } { @@ -15810,17 +15810,17 @@ index: 0 } { - struct: crashdump + struct: crash_dump type: uni - name: crashdump + name: crash_dump act: req - package: rv_core_ibex_pkg + package: ibex_pkg inst_name: rv_core_ibex width: 1 default: "" end_idx: -1 top_type: broadcast - top_signame: rv_core_ibex_crashdump + top_signame: rv_core_ibex_crash_dump index: -1 } { @@ -16547,9 +16547,9 @@ default: "" } { - package: rv_core_ibex_pkg - struct: crashdump - signame: rv_core_ibex_crashdump + package: ibex_pkg + struct: crash_dump + signame: rv_core_ibex_crash_dump width: 1 type: uni end_idx: -1
diff --git a/hw/top_earlgrey/data/top_earlgrey.hjson b/hw/top_earlgrey/data/top_earlgrey.hjson index cedd1dc..9033e0d 100755 --- a/hw/top_earlgrey/data/top_earlgrey.hjson +++ b/hw/top_earlgrey/data/top_earlgrey.hjson
@@ -189,11 +189,11 @@ package: "prim_esc_pkg", }, - { struct: "crashdump", + { struct: "crash_dump", type: "uni", - name: "crashdump", + name: "crash_dump", act: "req", - package: "rv_core_ibex_pkg", + package: "ibex_pkg", }, ], } @@ -754,7 +754,7 @@ 'pwrmgr_aon.low_power' : ['pinmux_aon.sleep_en','aon_timer_aon.sleep_mode'], 'flash_ctrl.keymgr' : ['keymgr.flash'], 'alert_handler.crashdump' : ['rstmgr_aon.alert_dump'], - 'rv_core_ibex.crashdump' : ['rstmgr_aon.cpu_dump'], + 'rv_core_ibex.crash_dump' : ['rstmgr_aon.cpu_dump'], 'csrng.entropy_src_hw_if' : ['entropy_src.entropy_src_hw_if'], // usbdev connection to pinmux
diff --git a/hw/top_earlgrey/data/top_earlgrey.original.hjson b/hw/top_earlgrey/data/top_earlgrey.original.hjson new file mode 100644 index 0000000..907d4de --- /dev/null +++ b/hw/top_earlgrey/data/top_earlgrey.original.hjson
@@ -0,0 +1,874 @@ +// Copyright lowRISC contributors. +// Licensed under the Apache License, Version 2.0, see LICENSE for details. +// SPDX-License-Identifier: Apache-2.0 +// ------------------- W A R N I N G: A U T O - G E N E R A T E D C O D E !! -------------------// + +// This file has been automatically created from top_earlgrey.hjson. +// This is a reformatted copy of top_earlgrey.hjson +{ + name: earlgrey + type: top + rnd_cnst_seed: 4881560218908238235 + datawidth: "32" + clocks: + { + hier_paths: + { + top: clkmgr_clocks. + ext: "" + } + srcs: + [ + { + name: main + aon: no + freq: "100000000" + } + { + name: io + aon: no + freq: "96000000" + } + { + name: usb + aon: no + freq: "48000000" + } + { + name: aon + aon: yes + freq: "200000" + } + ] + derived_srcs: + [ + { + name: io_div2 + aon: no + div: 2 + src: io + freq: "48000000" + } + { + name: io_div4 + aon: no + div: 4 + src: io + freq: "24000000" + } + ] + groups: + [ + { + name: powerup + src: top + sw_cg: no + } + { + name: trans + src: top + sw_cg: hint + unique: yes + } + { + name: infra + src: top + sw_cg: no + } + { + name: secure + src: top + sw_cg: no + } + { + name: peri + src: top + sw_cg: yes + unique: no + } + { + name: timers + src: top + sw_cg: no + } + { + name: proc + src: no + sw_cg: no + unique: no + clocks: + { + clk_proc_main: main + } + } + ] + } + resets: + { + hier_paths: + { + top: rstmgr_resets. + ext: "" + } + nodes: + [ + { + name: rst_ni + gen: false + type: ext + } + { + name: por_aon + gen: false + type: top + parent: rst_ni + clk: aon + } + { + name: lc_src + gen: false + type: int + parent: por + clk: io_div2 + } + { + name: sys_src + gen: false + type: int + parent: por + clk: io_div2 + } + { + name: por + gen: true + type: top + parent: por_aon + clk: main + } + { + name: por_io + gen: true + type: top + parent: por_aon + clk: io + } + { + name: por_io_div2 + gen: true + type: top + parent: por_aon + clk: io_div2 + } + { + name: por_io_div4 + gen: true + type: top + parent: por_aon + clk: io_div4 + } + { + name: por_usb + gen: true + type: top + parent: por_aon + clk: usb + } + { + name: lc + gen: true + type: top + domain: "0" + parent: lc_src + clk: main + } + { + name: lc_io + gen: true + type: top + domain: "0" + parent: lc_src + clk: io_div4 + } + { + name: sys + gen: true + type: top + domain: "0" + parent: sys_src + clk: main + } + { + name: sys_io + gen: true + type: top + domain: "0" + parent: sys_src + clk: io_div2 + } + { + name: sys_io_div4 + gen: true + type: top + domain: "0" + parent: sys_src + clk: io_div4 + } + { + name: sys_aon + gen: true + type: top + domain: "0" + parent: sys_src + clk: aon + } + { + name: spi_device + gen: true + type: top + domain: "0" + parent: sys_src + clk: io_div2 + sw: 1 + } + { + name: usb + gen: true + type: top + domain: "0" + parent: sys_src + clk: usb + sw: 1 + } + ] + } + num_cores: "1" + module: + [ + { + name: uart + type: uart + clock_srcs: + { + clk_i: io_div4 + } + reset_connections: + { + rst_ni: sys_io_div4 + } + base_addr: 0x40000000 + } + { + name: gpio + type: gpio + clock_srcs: + { + clk_i: io_div4 + } + clock_group: peri + reset_connections: + { + rst_ni: sys_io_div4 + } + base_addr: 0x40010000 + } + { + name: spi_device + type: spi_device + clock_srcs: + { + clk_i: io_div4 + } + clock_group: peri + reset_connections: + { + rst_ni: spi_device + } + base_addr: 0x40020000 + } + { + name: flash_ctrl + type: flash_ctrl + clock_srcs: + { + clk_i: main + } + clock_group: infra + reset_connections: + { + rst_ni: lc + } + base_addr: 0x40030000 + generated: "true" + } + { + name: rv_timer + type: rv_timer + clock_srcs: + { + clk_i: io_div4 + } + clock_group: timers + reset_connections: + { + rst_ni: sys_io_div4 + } + base_addr: 0x40080000 + } + { + name: aes + type: aes + clock_srcs: + { + clk_i: main + } + clock_group: trans + reset_connections: + { + rst_ni: sys + } + base_addr: 0x40110000 + } + { + name: hmac + type: hmac + clock_srcs: + { + clk_i: main + } + clock_group: trans + reset_connections: + { + rst_ni: sys + } + base_addr: 0x40120000 + } + { + name: rv_plic + type: rv_plic + clock_srcs: + { + clk_i: main + } + clock_group: secure + reset_connections: + { + rst_ni: sys + } + base_addr: 0x40090000 + generated: "true" + } + { + name: pinmux + type: pinmux + clock: main + clock_srcs: + { + clk_i: main + clk_aon_i: aon + } + clock_group: secure + reset_connections: + { + rst_ni: sys + rst_aon_ni: sys_aon + } + base_addr: 0x40070000 + generated: "true" + } + { + name: padctrl + type: padctrl + clock: main + clock_srcs: + { + clk_i: main + } + clock_group: secure + reset_connections: + { + rst_ni: sys + } + base_addr: 0x40160000 + generated: "true" + } + { + name: alert_handler + type: alert_handler + clock_srcs: + { + clk_i: main + } + clock_group: secure + reset_connections: + { + rst_ni: sys + } + base_addr: 0x40130000 + generated: "true" + localparam: + { + EscCntDw: 32 + AccuCntDw: 16 + LfsrSeed: 0x7FFFFFFF + } + } + { + name: pwrmgr + type: pwrmgr + clock_srcs: + { + clk_i: io_div4 + clk_slow_i: aon + } + clock_group: powerup + reset_connections: + { + rst_ni: por + rst_slow_ni: por_aon + } + base_addr: 0x400A0000 + generated: "true" + } + { + name: rstmgr + type: rstmgr + clock_srcs: + { + clk_i: io_div4 + clk_aon_i: aon + clk_main_i: main + clk_io_i: io + clk_usb_i: usb + clk_io_div2_i: io_div2 + clk_io_div4_i: io_div4 + } + clock_group: powerup + reset_connections: + { + rst_ni: rst_ni + } + base_addr: 0x400B0000 + generated: "true" + } + { + name: clkmgr + type: clkmgr + clock_srcs: + { + clk_i: io_div4 + } + clock_group: powerup + reset_connections: + { + rst_ni: por_io + rst_main_ni: por + rst_io_ni: por_io + rst_usb_ni: por_usb + rst_io_div2_ni: por_io_div2 + rst_io_div4_ni: por_io_div4 + } + base_addr: 0x400C0000 + generated: "true" + } + { + name: nmi_gen + type: nmi_gen + clock_srcs: + { + clk_i: main + } + clock_group: secure + reset_connections: + { + rst_ni: sys + } + base_addr: 0x40140000 + } + { + name: usbdev + type: usbdev + clock_srcs: + { + clk_i: io_div4 + clk_usb_48mhz_i: usb + } + clock_group: peri + clock_reset_export: + [ + ast + ] + reset_connections: + { + rst_ni: sys_io_div4 + rst_usb_48mhz_ni: usb + } + base_addr: 0x40150000 + } + { + name: sensor_ctrl + type: sensor_ctrl + clock_srcs: + { + clk_i: io_div4 + } + clock_group: secure + clock_reset_export: + [ + ast + ] + reset_connections: + { + rst_ni: sys_io_div4 + } + base_addr: 0x40170000 + top_only: "true" + } + { + name: keymgr + type: keymgr + clock_srcs: + { + clk_i: main + } + clock_group: secure + reset_connections: + { + rst_ni: sys + } + base_addr: 0x401a0000 + } + { + name: otp_ctrl + type: otp_ctrl + clock_srcs: + { + clk_i: io_div4 + } + clock_group: timers + reset_connections: + { + rst_ni: lc_io + } + base_addr: 0x401b0000 + } + { + name: otbn + type: otbn + clock_srcs: + { + clk_i: main + } + clock_group: trans + reset_connections: + { + rst_ni: sys + } + base_addr: 0x50000000 + } + ] + memory: + [ + { + name: rom + clock_srcs: + { + clk_i: main + } + clock_group: infra + reset_connections: + { + rst_ni: sys + } + type: rom + base_addr: 0x00008000 + swaccess: ro + size: 0x4000 + inter_signal_list: + [ + { + struct: tl + package: tlul_pkg + type: req_rsp + act: rsp + name: tl + } + ] + } + { + name: ram_main + clock_srcs: + { + clk_i: main + } + clock_group: infra + reset_connections: + { + rst_ni: sys + } + type: ram_1p + base_addr: 0x10000000 + size: 0x10000 + inter_signal_list: + [ + { + struct: tl + package: tlul_pkg + type: req_rsp + act: rsp + name: tl + } + ] + } + { + name: ram_ret + clock_srcs: + { + clk_i: io_div4 + } + clock_group: infra + reset_connections: + { + rst_ni: sys_io_div4 + } + type: ram_1p + base_addr: 0x18000000 + size: 0x1000 + inter_signal_list: + [ + { + struct: tl + package: tlul_pkg + type: req_rsp + act: rsp + name: tl + } + ] + } + { + name: eflash + clock_srcs: + { + clk_i: main + } + clock_group: infra + reset_connections: + { + rst_ni: lc + } + type: eflash + base_addr: 0x20000000 + banks: 2 + pages_per_bank: 256 + swaccess: ro + inter_signal_list: + [ + { + struct: flash + type: req_rsp + name: flash_ctrl + act: rsp + } + { + struct: tl + package: tlul_pkg + type: req_rsp + act: rsp + name: tl + } + ] + } + ] + inter_module: + { + connect: + { + flash_ctrl.flash: + [ + eflash.flash_ctrl + ] + pwrmgr.pwr_flash: + [ + flash_ctrl.pwrmgr + ] + pwrmgr.pwr_rst: + [ + rstmgr.pwr + ] + pwrmgr.pwr_clk: + [ + clkmgr.pwr + ] + pwrmgr.pwr_otp: + [ + otp_ctrl.pwr_otp + ] + flash_ctrl.keymgr: + [ + keymgr.flash + ] + alert_handler.crashdump: + [ + rstmgr.alert_dump + ] + clkmgr.idle: [] + } + top: + [ + rstmgr.resets + rstmgr.cpu + pwrmgr.pwr_cpu + clkmgr.clocks + main.tl_corei + main.tl_cored + main.tl_dm_sba + main.tl_debug_mem + ] + external: + { + clkmgr.clk_main: clk_main + clkmgr.clk_io: clk_io + clkmgr.clk_usb: clk_usb + clkmgr.clk_aon: clk_aon + rstmgr.ast: "" + pwrmgr.pwr_ast: "" + sensor_ctrl.ast_alert: "" + sensor_ctrl.ast_status: "" + usbdev.usb_ref_val: "" + usbdev.usb_ref_pulse: "" + peri.tl_ast_wrapper: ast_tl + otp_ctrl.otp_ast_pwr_seq: "" + otp_ctrl.otp_ast_pwr_seq_h: "" + } + } + debug_mem_base_addr: 0x1A110000 + xbar: + [ + { + name: main + clock_srcs: + { + clk_main_i: main + clk_fixed_i: io_div4 + } + clock_group: infra + reset: sys + reset_connections: + { + rst_main_ni: sys + rst_fixed_ni: sys_io_div4 + } + } + { + name: peri + clock_srcs: + { + clk_peri_i: io_div4 + } + clock_group: infra + reset: sys_io_div4 + reset_connections: + { + rst_peri_ni: sys_io_div4 + } + } + ] + interrupt_module: + [ + gpio + uart + spi_device + flash_ctrl + hmac + alert_handler + nmi_gen + usbdev + pwrmgr + otbn + keymgr + ] + interrupt: [] + alert_module: + [ + aes + otbn + sensor_ctrl + keymgr + otp_ctrl + ] + alert: [] + pinmux: + { + num_mio: 32 + dio_modules: + [ + { + name: spi_device + pad: + [ + ChB[0..3] + ] + } + { + name: uart + pad: + [ + ChA[0..1] + ] + } + { + name: usbdev + pad: + [ + ChC[0..8] + ] + } + ] + mio_modules: + [ + uart + gpio + ] + nc_modules: + [ + rv_timer + hmac + ] + num_wkup_detect: 8 + wkup_cnt_width: 8 + } + padctrl: + { + attr_default: + [ + STRONG + ] + pads: + [ + { + name: ChA + type: IO_33V + count: 32 + } + { + name: ChB + type: IO_33V + count: 4 + attr: + [ + KEEP + WEAK + ] + } + { + name: ChC + type: IO_33V + count: 4 + attr: + [ + KEEP + STRONG + ] + } + ] + } +} \ No newline at end of file
diff --git a/hw/top_earlgrey/data/top_earlgrey.sv.tpl b/hw/top_earlgrey/data/top_earlgrey.sv.tpl index 92fc843..24fcf24 100644 --- a/hw/top_earlgrey/data/top_earlgrey.sv.tpl +++ b/hw/top_earlgrey/data/top_earlgrey.sv.tpl
@@ -291,7 +291,7 @@ // debug interface .debug_req_i (debug_req), // crash dump interface - .crash_dump_o (rv_core_ibex_crashdump), + .crash_dump_o (rv_core_ibex_crash_dump), // CPU control signals // TODO #5356 .fetch_enable_i (lc_ctrl_pkg::On),
diff --git a/hw/top_earlgrey/ip/rstmgr/data/autogen/rstmgr.hjson b/hw/top_earlgrey/ip/rstmgr/data/autogen/rstmgr.hjson index 761bbd7..33df64a 100644 --- a/hw/top_earlgrey/ip/rstmgr/data/autogen/rstmgr.hjson +++ b/hw/top_earlgrey/ip/rstmgr/data/autogen/rstmgr.hjson
@@ -88,11 +88,11 @@ package: "alert_pkg", }, - { struct: "crashdump", + { struct: "crash_dump", type: "uni", name: "cpu_dump", act: "rcv", - package: "rv_core_ibex_pkg", + package: "ibex_pkg", }, // Exported resets
diff --git a/hw/top_earlgrey/ip/rstmgr/rtl/autogen/rstmgr.sv b/hw/top_earlgrey/ip/rstmgr/rtl/autogen/rstmgr.sv index 629d336..54f2806 100644 --- a/hw/top_earlgrey/ip/rstmgr/rtl/autogen/rstmgr.sv +++ b/hw/top_earlgrey/ip/rstmgr/rtl/autogen/rstmgr.sv
@@ -39,7 +39,7 @@ input alert_pkg::alert_crashdump_t alert_dump_i, // Interface to cpu crash dump - input rv_core_ibex_pkg::crashdump_t cpu_dump_i, + input ibex_pkg::crash_dump_t cpu_dump_i, // dft bypass input scan_rst_ni, @@ -724,7 +724,7 @@ ); rstmgr_crash_info #( - .CrashDumpWidth($bits(rv_core_ibex_pkg::crashdump_t)) + .CrashDumpWidth($bits(ibex_pkg::crash_dump_t)) ) u_cpu_info ( .clk_i, .rst_ni,
diff --git a/hw/top_earlgrey/rtl/autogen/top_earlgrey.sv b/hw/top_earlgrey/rtl/autogen/top_earlgrey.sv index 7cdd37b..9f54d58 100644 --- a/hw/top_earlgrey/rtl/autogen/top_earlgrey.sv +++ b/hw/top_earlgrey/rtl/autogen/top_earlgrey.sv
@@ -437,7 +437,7 @@ pwrmgr_pkg::pwr_lc_rsp_t pwrmgr_aon_pwr_lc_rsp; logic pwrmgr_aon_strap; logic pwrmgr_aon_low_power; - rv_core_ibex_pkg::crashdump_t rv_core_ibex_crashdump; + ibex_pkg::crash_dump_t rv_core_ibex_crash_dump; logic usbdev_usb_out_of_rst; logic usbdev_usb_aon_wake_en; logic usbdev_usb_aon_wake_ack; @@ -671,7 +671,7 @@ // debug interface .debug_req_i (debug_req), // crash dump interface - .crash_dump_o (rv_core_ibex_crashdump), + .crash_dump_o (rv_core_ibex_crash_dump), // CPU control signals // TODO #5356 .fetch_enable_i (lc_ctrl_pkg::On), @@ -1560,7 +1560,7 @@ .resets_o(rstmgr_aon_resets), .cpu_i(rstmgr_aon_cpu), .alert_dump_i(alert_handler_crashdump), - .cpu_dump_i(rv_core_ibex_crashdump), + .cpu_dump_i(rv_core_ibex_crash_dump), .resets_ast_o(rsts_ast_o), .tl_i(rstmgr_aon_tl_req), .tl_o(rstmgr_aon_tl_rsp),
diff --git a/hw/top_englishbreakfast/data/top_englishbreakfast.hjson b/hw/top_englishbreakfast/data/top_englishbreakfast.hjson index 3f89cfb..0895384 100644 --- a/hw/top_englishbreakfast/data/top_englishbreakfast.hjson +++ b/hw/top_englishbreakfast/data/top_englishbreakfast.hjson
@@ -185,11 +185,11 @@ package: "prim_esc_pkg", }, - { struct: "crashdump", + { struct: "crash_dump", type: "uni", - name: "crashdump", + name: "crash_dump", act: "req", - package: "rv_core_ibex_pkg", + package: "ibex_pkg", }, ], } @@ -564,7 +564,7 @@ 'pwrmgr_aon.pwr_rst' : ['rstmgr_aon.pwr'], 'pwrmgr_aon.pwr_clk' : ['clkmgr_aon.pwr'], 'pwrmgr_aon.pwr_lc' : ['lc_ctrl.pwr_lc'], - 'rv_core_ibex.crashdump' : ['rstmgr_aon.cpu_dump'], + 'rv_core_ibex.crash_dump' : ['rstmgr_aon.cpu_dump'], // usbdev connection to pinmux 'usbdev.usb_out_of_rst' : ['pinmux_aon.usb_out_of_rst'],