commit c2ae4bceadbf96cbe2053046977ea4acfb00e6c2
author Silvestrs Timofejevs <silvestrst@lowrisc.org> Fri Feb 21 10:02:22 2020 +0000
committer Philipp Wagner <mail@philipp-wagner.com> Mon Feb 24 14:40:37 2020 +0000
tree 35f3d511b62e564b7897bfb9b455a5f7d9501248
parent 147c05719c91e6b0653c23ec2cf64e8ac69b44fd

[sw, dif_plic] Rename kDifPlicIrqIdUartTxOverflow to match RTL

UART RTL has the following change: tx_overflow -> tx_empty. This
change keeps DIF_PLIC and the RTL in sync.

Signed-off-by: Silvestrs Timofejevs <silvestrst@lowrisc.org>

sw/device/lib/dif/dif_plic.h

diff --git a/sw/device/lib/dif/dif_plic.h b/sw/device/lib/dif/dif_plic.h
index 471eb28..ded804e 100644
--- a/sw/device/lib/dif/dif_plic.h
+++ b/sw/device/lib/dif/dif_plic.h
@@ -52,7 +52,7 @@
   kDifPlicIrqIdGpio31 = 32,          /**< GPIO pin 31. */
   kDifPlicIrqIdUartTxWatermark = 33, /**< UART TX FIFO watermark. */
   kDifPlicIrqIdUartRxWatermark = 34, /**< UART RX FIFO watermark. */
-  kDifPlicIrqIdUartTxOverflow = 35,  /**< UART TX FIFO overflow. */
+  kDifPlicIrqIdUartTxEmpty = 35,     /**< UART TX FIFO empty. */
   kDifPlicIrqIdUartRxOverflow = 36,  /**< UART RX FIFO overflow. */
   kDifPlicIrqIdUartRxFrameErr = 37,  /**< UART RX frame error. */
   kDifPlicIrqIdUartRxBreakErr = 38,  /**< UART RX break error. */

sw/device/tests/consecutive_irqs/consecutive_irqs_test.c

diff --git a/sw/device/tests/consecutive_irqs/consecutive_irqs_test.c b/sw/device/tests/consecutive_irqs/consecutive_irqs_test.c
index f3d51b0..9099953 100644
--- a/sw/device/tests/consecutive_irqs/consecutive_irqs_test.c
+++ b/sw/device/tests/consecutive_irqs/consecutive_irqs_test.c
@@ -64,7 +64,7 @@
         uart_rx_overflow_handled = true;
       }
       break;
-    case kDifPlicIrqIdUartTxOverflow:
+    case kDifPlicIrqIdUartTxEmpty:
       uart_irq = kDifUartInterruptTxEmpty;
 
       // It is an error if this IRQ is asserted more than once.
@@ -162,7 +162,7 @@
               "PLIC: RX overflow trigger type set failed!\n");
     return false;
   }
-  if (!dif_plic_irq_trigger_type_set(plic, kDifPlicIrqIdUartTxOverflow,
+  if (!dif_plic_irq_trigger_type_set(plic, kDifPlicIrqIdUartTxEmpty,
                                      kDifPlicDisable)) {
     print_log(uart_print_char_p, "PLIC: TX empty trigger type set failed!\n");
     return false;
@@ -175,7 +175,7 @@
               "PLIC: priority set for RX overflow failed!\n");
     return false;
   }
-  if (!dif_plic_irq_priority_set(plic, kDifPlicIrqIdUartTxOverflow,
+  if (!dif_plic_irq_priority_set(plic, kDifPlicIrqIdUartTxEmpty,
                                  PLIC_PRIORITY_MAX)) {
     print_log(uart_print_char_p, "PLIC: priority set for TX empty failed!\n");
     return false;
@@ -194,7 +194,7 @@
               "PLIC: interrupt Enable for RX overflow failed!\n");
     return false;
   }
-  if (!dif_plic_irq_enable_set(plic, kDifPlicIrqIdUartTxOverflow, PLIC_TARGET,
+  if (!dif_plic_irq_enable_set(plic, kDifPlicIrqIdUartTxEmpty, PLIC_TARGET,
                                kDifPlicEnable)) {
     print_log(uart_print_char_p,
               "PLIC: interrupt Enable for TX empty failed!\n");