[top] Move alert handler to periphs and attach escalation clock to ibex Signed-off-by: Michael Schaffner <msf@opentitan.org>
diff --git a/hw/ip/prim/rtl/prim_esc_pkg.sv b/hw/ip/prim/rtl/prim_esc_pkg.sv index df3529e..8cd9c4e 100644 --- a/hw/ip/prim/rtl/prim_esc_pkg.sv +++ b/hw/ip/prim/rtl/prim_esc_pkg.sv
@@ -9,8 +9,6 @@ logic esc_n; } esc_tx_t; - parameter esc_tx_t ESC_TX_DEFAULT = 2'b01; - typedef struct packed { logic resp_p; logic resp_n;
diff --git a/hw/top_earlgrey/data/top_earlgrey.hjson b/hw/top_earlgrey/data/top_earlgrey.hjson index bdd27dd..158521c 100755 --- a/hw/top_earlgrey/data/top_earlgrey.hjson +++ b/hw/top_earlgrey/data/top_earlgrey.hjson
@@ -82,7 +82,7 @@ // The powerup and proc groups are unique. // The powerup group of clocks do not feed through the clock // controller as they manage clock controller behavior - // The proc group is not peripheral, and direclty hardwired + // The proc group is not peripheral, and directly hardwired groups: [ // the powerup group is used exclusively by clk/pwr/rstmgr @@ -228,6 +228,28 @@ reset_connections: {rst_ni: "lc_io_div4"}, base_addr: "0x40140000", }, + { name: "alert_handler", + type: "alert_handler", + clock_srcs: {clk_i: "io_div4"}, + clock_group: "timers", + reset_connections: {rst_ni: "sys_io_div4"}, + base_addr: "0x40150000", + generated: "true" // Indicate this module is generated in the topgen + localparam: { + EscCntDw: 32, + AccuCntDw: 16, + LfsrSeed: "0x7FFFFFFF" + } + }, + // dummy module to capture the alert handler escalation signals + // and test them by converting them into IRQs + { name: "nmi_gen", + type: "nmi_gen", + clock_srcs: {clk_i: "io_div4"}, + clock_group: "timers", + reset_connections: {rst_ni: "sys_io_div4"}, + base_addr: "0x40160000", + } { name: "pwrmgr", type: "pwrmgr", clock_srcs: {clk_i: "io_div4", clk_slow_i: "aon"}, @@ -362,28 +384,6 @@ reset_connections: {rst_ni: "sys"}, base_addr: "0x41180000", }, - { name: "alert_handler", - type: "alert_handler", - clock_srcs: {clk_i: "main"}, - clock_group: "secure", - reset_connections: {rst_ni: "sys"}, - base_addr: "0x411b0000", - generated: "true" // Indicate this module is generated in the topgen - localparam: { - EscCntDw: 32, - AccuCntDw: 16, - LfsrSeed: "0x7FFFFFFF" - } - }, - // dummy module to capture the alert handler escalation signals - // and test them by converting them into IRQs - { name: "nmi_gen", - type: "nmi_gen", - clock_srcs: {clk_i: "main"}, - clock_group: "secure", - reset_connections: {rst_ni: "sys"}, - base_addr: "0x411c0000", - }, { name: "otbn", type: "otbn", clock_srcs: {clk_i: "main"},
diff --git a/hw/top_earlgrey/data/top_earlgrey.sv.tpl b/hw/top_earlgrey/data/top_earlgrey.sv.tpl index 4c78b3e..4896798 100644 --- a/hw/top_earlgrey/data/top_earlgrey.sv.tpl +++ b/hw/top_earlgrey/data/top_earlgrey.sv.tpl
@@ -28,6 +28,8 @@ cpu_clk = top['clocks']['hier_paths']['top'] + "clk_proc_main" cpu_rst = top["reset_paths"]["sys"] dm_rst = top["reset_paths"]["lc"] +esc_clk = top['clocks']['hier_paths']['top'] + "clk_io_div4_timers" +esc_rst = top["reset_paths"]["sys_io_div4"] unused_resets = lib.get_unused_resets(top) %>\ @@ -226,6 +228,8 @@ // clock and reset .clk_i (${cpu_clk}), .rst_ni (${cpu_rst}[rstmgr_pkg::Domain0Sel]), + .clk_esc_i (${esc_clk}), + .rst_esc_ni (${esc_rst}[rstmgr_pkg::Domain0Sel]), .test_en_i (1'b0), // static pinning .hart_id_i (32'b0), @@ -240,8 +244,6 @@ .irq_timer_i (intr_rv_timer_timer_expired_0_0), .irq_external_i (irq_plic), // escalation input from alert handler (NMI) - // TODO: need to put the escalation receiver - // into the alert handler clock domain. .esc_tx_i (esc_tx[0]), .esc_rx_o (esc_rx[0]), // debug interface
diff --git a/hw/top_earlgrey/data/xbar_main.hjson b/hw/top_earlgrey/data/xbar_main.hjson index e31cd8f..463e716 100755 --- a/hw/top_earlgrey/data/xbar_main.hjson +++ b/hw/top_earlgrey/data/xbar_main.hjson
@@ -141,20 +141,6 @@ }], pipeline_byp: "false" }, - { name: "alert_handler", - type: "device", - clock: "clk_main_i", - inst_type: "alert_handler", - pipeline_byp: "false" - }, - // dummy module to capture the alert handler escalation signals - // and test them by converting them into IRQs - { name: "nmi_gen", - type: "device", - clock: "clk_main_i", - inst_type: "nmi_gen", - pipeline_byp: "false" - } { name: "otbn", type: "device", clock: "clk_main_i" @@ -172,9 +158,9 @@ corei: ["rom", "debug_mem", "ram_main", "eflash"], cored: ["rom", "debug_mem", "ram_main", "eflash", "peri", "flash_ctrl", "aes", "entropy_src", "csrng", "edn0", "edn1", - "hmac", "rv_plic", "pinmux", "padctrl", "alert_handler", "nmi_gen", "otbn", "keymgr", "kmac"], + "hmac", "rv_plic", "pinmux", "padctrl", "otbn", "keymgr", "kmac"], dm_sba: ["rom", "ram_main", "eflash", "peri", "flash_ctrl", "aes", "entropy_src", "csrng", "edn0", "edn1", - "hmac", "rv_plic", "pinmux", "padctrl", "alert_handler", "nmi_gen", "otbn", "kmac"], + "hmac", "rv_plic", "pinmux", "padctrl", "otbn", "kmac"], }, }
diff --git a/hw/top_earlgrey/data/xbar_peri.hjson b/hw/top_earlgrey/data/xbar_peri.hjson index d0f4392..14fd496 100644 --- a/hw/top_earlgrey/data/xbar_peri.hjson +++ b/hw/top_earlgrey/data/xbar_peri.hjson
@@ -87,6 +87,20 @@ reset: "rst_peri_ni", pipeline: "false", }, + { name: "alert_handler", + type: "device", + clock: "clk_peri_i", + reset: "rst_peri_ni", + pipeline: "false", + }, + // dummy module to capture the alert handler escalation signals + // and test them by converting them into IRQs + { name: "nmi_gen", + type: "device", + clock: "clk_peri_i", + reset: "rst_peri_ni", + pipeline: "false", + } { name: "ast_wrapper", type: "device", clock: "clk_peri_i", @@ -104,6 +118,6 @@ ], connections: { main: ["uart", "gpio", "spi_device", "rv_timer", "usbdev", "pwrmgr", "rstmgr", "clkmgr", - "ram_ret", "otp_ctrl", "lc_ctrl", "sensor_ctrl", "ast_wrapper"], + "ram_ret", "otp_ctrl", "lc_ctrl", "sensor_ctrl", "alert_handler", "nmi_gen", "ast_wrapper"], }, }