| // Copyright lowRISC contributors. |
| // Licensed under the Apache License, Version 2.0, see LICENSE for details. |
| // SPDX-License-Identifier: Apache-2.0 |
| // |
| // xbar_tgl_excl.cfg generated by `topgen.py` tool |
| |
| // [UNSUPPORTED] Exclude unused TL port signals at all hierarchies, wherever port toggle coverage is |
| // enabled. Exercising these reserved signals will result in assertion errors thrown by the design. |
| -node tb.dut*.u_* *tl_*.a_param |
| -node tb.dut*.u_* *tl_*.d_param |
| -node tb.dut*.u_* *tl_*.d_opcode[2:1] |
| -node tb.dut*.u_* *tl_*.a_source[7:6] |
| -node tb.dut*.u_* *tl_*.d_source[7:6] |
| -node tb.dut.top_earlgrey *tl_*.a_param |
| -node tb.dut.top_earlgrey *tl_*.d_param |
| -node tb.dut.top_earlgrey *tl_*.d_opcode[2:1] |
| -node tb.dut.top_earlgrey *tl_*.a_source[7:6] |
| -node tb.dut.top_earlgrey *tl_*.d_source[7:6] |
| |
| // [LOW_RISK] Exclude the full TL a_address signal on all pass-through hierarchies. We instead look |
| // at the full coverage of this signal directly at the host or at the device. |
| -node tb.dut.top_earlgrey *tl_*.a_address |
| -node tb.dut.top_earlgrey.u_xbar_* tl_*.a_address |
| |
| // [UNR] Exclude unused address bits based on IP address range. It is not possible to cover this. |
| -node tb.dut*.u_rv_dm__regs *tl_i.a_address[20:12] |
| -node tb.dut*.u_rv_dm__regs *tl_i.a_address[23:22] |
| -node tb.dut*.u_rv_dm__regs *tl_i.a_address[29:25] |
| -node tb.dut*.u_rv_dm__regs *tl_i.a_address[31:31] |
| -node tb.dut*.u_rv_dm__rom *tl_i.a_address[15:12] |
| -node tb.dut*.u_rv_dm__rom *tl_i.a_address[31:17] |
| -node tb.dut*.u_rom_ctrl__rom *tl_i.a_address[14:14] |
| -node tb.dut*.u_rom_ctrl__rom *tl_i.a_address[31:16] |
| -node tb.dut*.u_rom_ctrl__regs *tl_i.a_address[16:12] |
| -node tb.dut*.u_rom_ctrl__regs *tl_i.a_address[23:21] |
| -node tb.dut*.u_rom_ctrl__regs *tl_i.a_address[29:25] |
| -node tb.dut*.u_rom_ctrl__regs *tl_i.a_address[31:31] |
| -node tb.dut*.u_flash_ctrl__core *tl_i.a_address[23:12] |
| -node tb.dut*.u_flash_ctrl__core *tl_i.a_address[29:25] |
| -node tb.dut*.u_flash_ctrl__core *tl_i.a_address[31:31] |
| -node tb.dut*.u_flash_ctrl__prim *tl_i.a_address[14:12] |
| -node tb.dut*.u_flash_ctrl__prim *tl_i.a_address[23:16] |
| -node tb.dut*.u_flash_ctrl__prim *tl_i.a_address[29:25] |
| -node tb.dut*.u_flash_ctrl__prim *tl_i.a_address[31:31] |
| -node tb.dut*.u_flash_ctrl__mem *tl_i.a_address[28:20] |
| -node tb.dut*.u_flash_ctrl__mem *tl_i.a_address[31:30] |
| -node tb.dut*.u_hmac *tl_i.a_address[15:12] |
| -node tb.dut*.u_hmac *tl_i.a_address[19:17] |
| -node tb.dut*.u_hmac *tl_i.a_address[23:21] |
| -node tb.dut*.u_hmac *tl_i.a_address[29:25] |
| -node tb.dut*.u_hmac *tl_i.a_address[31:31] |
| -node tb.dut*.u_kmac *tl_i.a_address[16:12] |
| -node tb.dut*.u_kmac *tl_i.a_address[19:18] |
| -node tb.dut*.u_kmac *tl_i.a_address[23:21] |
| -node tb.dut*.u_kmac *tl_i.a_address[29:25] |
| -node tb.dut*.u_kmac *tl_i.a_address[31:31] |
| -node tb.dut*.u_aes *tl_i.a_address[19:12] |
| -node tb.dut*.u_aes *tl_i.a_address[23:21] |
| -node tb.dut*.u_aes *tl_i.a_address[29:25] |
| -node tb.dut*.u_aes *tl_i.a_address[31:31] |
| -node tb.dut*.u_entropy_src *tl_i.a_address[16:12] |
| -node tb.dut*.u_entropy_src *tl_i.a_address[19:19] |
| -node tb.dut*.u_entropy_src *tl_i.a_address[23:21] |
| -node tb.dut*.u_entropy_src *tl_i.a_address[29:25] |
| -node tb.dut*.u_entropy_src *tl_i.a_address[31:31] |
| -node tb.dut*.u_csrng *tl_i.a_address[15:12] |
| -node tb.dut*.u_csrng *tl_i.a_address[17:17] |
| -node tb.dut*.u_csrng *tl_i.a_address[19:19] |
| -node tb.dut*.u_csrng *tl_i.a_address[23:21] |
| -node tb.dut*.u_csrng *tl_i.a_address[29:25] |
| -node tb.dut*.u_csrng *tl_i.a_address[31:31] |
| -node tb.dut*.u_edn0 *tl_i.a_address[15:12] |
| -node tb.dut*.u_edn0 *tl_i.a_address[19:19] |
| -node tb.dut*.u_edn0 *tl_i.a_address[23:21] |
| -node tb.dut*.u_edn0 *tl_i.a_address[29:25] |
| -node tb.dut*.u_edn0 *tl_i.a_address[31:31] |
| -node tb.dut*.u_edn1 *tl_i.a_address[18:12] |
| -node tb.dut*.u_edn1 *tl_i.a_address[23:21] |
| -node tb.dut*.u_edn1 *tl_i.a_address[29:25] |
| -node tb.dut*.u_edn1 *tl_i.a_address[31:31] |
| -node tb.dut*.u_rv_plic *tl_i.a_address[29:28] |
| -node tb.dut*.u_rv_plic *tl_i.a_address[31:31] |
| -node tb.dut*.u_otbn *tl_i.a_address[17:17] |
| -node tb.dut*.u_otbn *tl_i.a_address[23:21] |
| -node tb.dut*.u_otbn *tl_i.a_address[29:25] |
| -node tb.dut*.u_otbn *tl_i.a_address[31:31] |
| -node tb.dut*.u_keymgr *tl_i.a_address[15:12] |
| -node tb.dut*.u_keymgr *tl_i.a_address[19:18] |
| -node tb.dut*.u_keymgr *tl_i.a_address[23:21] |
| -node tb.dut*.u_keymgr *tl_i.a_address[29:25] |
| -node tb.dut*.u_keymgr *tl_i.a_address[31:31] |
| -node tb.dut*.u_rv_core_ibex__cfg *tl_i.a_address[15:12] |
| -node tb.dut*.u_rv_core_ibex__cfg *tl_i.a_address[23:21] |
| -node tb.dut*.u_rv_core_ibex__cfg *tl_i.a_address[29:25] |
| -node tb.dut*.u_rv_core_ibex__cfg *tl_i.a_address[31:31] |
| -node tb.dut*.u_sram_ctrl_main__regs *tl_i.a_address[17:12] |
| -node tb.dut*.u_sram_ctrl_main__regs *tl_i.a_address[23:21] |
| -node tb.dut*.u_sram_ctrl_main__regs *tl_i.a_address[29:25] |
| -node tb.dut*.u_sram_ctrl_main__regs *tl_i.a_address[31:31] |
| -node tb.dut*.u_sram_ctrl_main__ram *tl_i.a_address[27:17] |
| -node tb.dut*.u_sram_ctrl_main__ram *tl_i.a_address[31:29] |
| -node tb.dut*.u_uart0 *tl_i.a_address[29:12] |
| -node tb.dut*.u_uart0 *tl_i.a_address[31:31] |
| -node tb.dut*.u_uart1 *tl_i.a_address[15:12] |
| -node tb.dut*.u_uart1 *tl_i.a_address[29:17] |
| -node tb.dut*.u_uart1 *tl_i.a_address[31:31] |
| -node tb.dut*.u_uart2 *tl_i.a_address[16:12] |
| -node tb.dut*.u_uart2 *tl_i.a_address[29:18] |
| -node tb.dut*.u_uart2 *tl_i.a_address[31:31] |
| -node tb.dut*.u_uart3 *tl_i.a_address[15:12] |
| -node tb.dut*.u_uart3 *tl_i.a_address[29:18] |
| -node tb.dut*.u_uart3 *tl_i.a_address[31:31] |
| -node tb.dut*.u_i2c0 *tl_i.a_address[18:12] |
| -node tb.dut*.u_i2c0 *tl_i.a_address[29:20] |
| -node tb.dut*.u_i2c0 *tl_i.a_address[31:31] |
| -node tb.dut*.u_i2c1 *tl_i.a_address[15:12] |
| -node tb.dut*.u_i2c1 *tl_i.a_address[18:17] |
| -node tb.dut*.u_i2c1 *tl_i.a_address[29:20] |
| -node tb.dut*.u_i2c1 *tl_i.a_address[31:31] |
| -node tb.dut*.u_i2c2 *tl_i.a_address[16:12] |
| -node tb.dut*.u_i2c2 *tl_i.a_address[18:18] |
| -node tb.dut*.u_i2c2 *tl_i.a_address[29:20] |
| -node tb.dut*.u_i2c2 *tl_i.a_address[31:31] |
| -node tb.dut*.u_pattgen *tl_i.a_address[16:12] |
| -node tb.dut*.u_pattgen *tl_i.a_address[29:20] |
| -node tb.dut*.u_pattgen *tl_i.a_address[31:31] |
| -node tb.dut*.u_pwm_aon *tl_i.a_address[15:12] |
| -node tb.dut*.u_pwm_aon *tl_i.a_address[17:17] |
| -node tb.dut*.u_pwm_aon *tl_i.a_address[21:19] |
| -node tb.dut*.u_pwm_aon *tl_i.a_address[29:23] |
| -node tb.dut*.u_pwm_aon *tl_i.a_address[31:31] |
| -node tb.dut*.u_gpio *tl_i.a_address[17:12] |
| -node tb.dut*.u_gpio *tl_i.a_address[29:19] |
| -node tb.dut*.u_gpio *tl_i.a_address[31:31] |
| -node tb.dut*.u_spi_device *tl_i.a_address[15:13] |
| -node tb.dut*.u_spi_device *tl_i.a_address[17:17] |
| -node tb.dut*.u_spi_device *tl_i.a_address[29:19] |
| -node tb.dut*.u_spi_device *tl_i.a_address[31:31] |
| -node tb.dut*.u_spi_host0 *tl_i.a_address[16:12] |
| -node tb.dut*.u_spi_host0 *tl_i.a_address[29:19] |
| -node tb.dut*.u_spi_host0 *tl_i.a_address[31:31] |
| -node tb.dut*.u_spi_host1 *tl_i.a_address[15:12] |
| -node tb.dut*.u_spi_host1 *tl_i.a_address[29:19] |
| -node tb.dut*.u_spi_host1 *tl_i.a_address[31:31] |
| -node tb.dut*.u_rv_timer *tl_i.a_address[19:12] |
| -node tb.dut*.u_rv_timer *tl_i.a_address[29:21] |
| -node tb.dut*.u_rv_timer *tl_i.a_address[31:31] |
| -node tb.dut*.u_usbdev *tl_i.a_address[15:12] |
| -node tb.dut*.u_usbdev *tl_i.a_address[19:17] |
| -node tb.dut*.u_usbdev *tl_i.a_address[29:21] |
| -node tb.dut*.u_usbdev *tl_i.a_address[31:31] |
| -node tb.dut*.u_pwrmgr_aon *tl_i.a_address[21:12] |
| -node tb.dut*.u_pwrmgr_aon *tl_i.a_address[29:23] |
| -node tb.dut*.u_pwrmgr_aon *tl_i.a_address[31:31] |
| -node tb.dut*.u_rstmgr_aon *tl_i.a_address[15:12] |
| -node tb.dut*.u_rstmgr_aon *tl_i.a_address[21:17] |
| -node tb.dut*.u_rstmgr_aon *tl_i.a_address[29:23] |
| -node tb.dut*.u_rstmgr_aon *tl_i.a_address[31:31] |
| -node tb.dut*.u_clkmgr_aon *tl_i.a_address[16:12] |
| -node tb.dut*.u_clkmgr_aon *tl_i.a_address[21:18] |
| -node tb.dut*.u_clkmgr_aon *tl_i.a_address[29:23] |
| -node tb.dut*.u_clkmgr_aon *tl_i.a_address[31:31] |
| -node tb.dut*.u_pinmux_aon *tl_i.a_address[16:12] |
| -node tb.dut*.u_pinmux_aon *tl_i.a_address[21:19] |
| -node tb.dut*.u_pinmux_aon *tl_i.a_address[29:23] |
| -node tb.dut*.u_pinmux_aon *tl_i.a_address[31:31] |
| -node tb.dut*.u_otp_ctrl__core *tl_i.a_address[15:13] |
| -node tb.dut*.u_otp_ctrl__core *tl_i.a_address[19:18] |
| -node tb.dut*.u_otp_ctrl__core *tl_i.a_address[29:21] |
| -node tb.dut*.u_otp_ctrl__core *tl_i.a_address[31:31] |
| -node tb.dut*.u_otp_ctrl__prim *tl_i.a_address[12:12] |
| -node tb.dut*.u_otp_ctrl__prim *tl_i.a_address[15:14] |
| -node tb.dut*.u_otp_ctrl__prim *tl_i.a_address[19:18] |
| -node tb.dut*.u_otp_ctrl__prim *tl_i.a_address[29:21] |
| -node tb.dut*.u_otp_ctrl__prim *tl_i.a_address[31:31] |
| -node tb.dut*.u_lc_ctrl *tl_i.a_address[17:12] |
| -node tb.dut*.u_lc_ctrl *tl_i.a_address[19:19] |
| -node tb.dut*.u_lc_ctrl *tl_i.a_address[29:21] |
| -node tb.dut*.u_lc_ctrl *tl_i.a_address[31:31] |
| -node tb.dut*.u_sensor_ctrl *tl_i.a_address[15:12] |
| -node tb.dut*.u_sensor_ctrl *tl_i.a_address[18:17] |
| -node tb.dut*.u_sensor_ctrl *tl_i.a_address[21:20] |
| -node tb.dut*.u_sensor_ctrl *tl_i.a_address[29:23] |
| -node tb.dut*.u_sensor_ctrl *tl_i.a_address[31:31] |
| -node tb.dut*.u_alert_handler *tl_i.a_address[15:12] |
| -node tb.dut*.u_alert_handler *tl_i.a_address[17:17] |
| -node tb.dut*.u_alert_handler *tl_i.a_address[19:19] |
| -node tb.dut*.u_alert_handler *tl_i.a_address[29:21] |
| -node tb.dut*.u_alert_handler *tl_i.a_address[31:31] |
| -node tb.dut*.u_sram_ctrl_ret_aon__regs *tl_i.a_address[19:12] |
| -node tb.dut*.u_sram_ctrl_ret_aon__regs *tl_i.a_address[21:21] |
| -node tb.dut*.u_sram_ctrl_ret_aon__regs *tl_i.a_address[29:23] |
| -node tb.dut*.u_sram_ctrl_ret_aon__regs *tl_i.a_address[31:31] |
| -node tb.dut*.u_sram_ctrl_ret_aon__ram *tl_i.a_address[20:12] |
| -node tb.dut*.u_sram_ctrl_ret_aon__ram *tl_i.a_address[29:23] |
| -node tb.dut*.u_sram_ctrl_ret_aon__ram *tl_i.a_address[31:31] |
| -node tb.dut*.u_aon_timer_aon *tl_i.a_address[15:12] |
| -node tb.dut*.u_aon_timer_aon *tl_i.a_address[21:19] |
| -node tb.dut*.u_aon_timer_aon *tl_i.a_address[29:23] |
| -node tb.dut*.u_aon_timer_aon *tl_i.a_address[31:31] |
| -node tb.dut*.u_sysrst_ctrl_aon *tl_i.a_address[15:12] |
| -node tb.dut*.u_sysrst_ctrl_aon *tl_i.a_address[21:18] |
| -node tb.dut*.u_sysrst_ctrl_aon *tl_i.a_address[29:23] |
| -node tb.dut*.u_sysrst_ctrl_aon *tl_i.a_address[31:31] |
| -node tb.dut*.u_adc_ctrl_aon *tl_i.a_address[17:12] |
| -node tb.dut*.u_adc_ctrl_aon *tl_i.a_address[21:19] |
| -node tb.dut*.u_adc_ctrl_aon *tl_i.a_address[29:23] |
| -node tb.dut*.u_adc_ctrl_aon *tl_i.a_address[31:31] |
| -node tb.dut*.u_ast *tl_i.a_address[18:12] |
| -node tb.dut*.u_ast *tl_i.a_address[21:20] |
| -node tb.dut*.u_ast *tl_i.a_address[29:23] |
| -node tb.dut*.u_ast *tl_i.a_address[31:31] |