[topgen] Restructure the directory Based on the discussion at https://docs.google.com/document/d/1-f8RFWwmFYT9B6YVZWs5uU2SWDzJ7LRZO-YSgdt2iJ0/edit# Now the topgen directory is restructured to have `ip/{ip}/` with `autogen` directory.

diff --git a/hw/top_earlgrey/dv/chip_sim.core b/hw/top_earlgrey/dv/chip_sim.core
index 70c6e59..15cb46f 100644
--- a/hw/top_earlgrey/dv/chip_sim.core
+++ b/hw/top_earlgrey/dv/chip_sim.core

@@ -11,7 +11,7 @@
       - lowrisc:ibex:ibex_tracer:0.1
     files:
       - ../rtl/top_earlgrey_asic.sv
-      - xbar_main_bind.sv
+      - ../ip/xbar/dv/autogen/xbar_main_bind.sv
     file_type: systemVerilogSource
 
   files_dv:

diff --git a/hw/top_earlgrey/doc/rv_plic.hjson b/hw/top_earlgrey/ip/rv_plic/doc/autogen/rv_plic.hjson
similarity index 100%
rename from hw/top_earlgrey/doc/rv_plic.hjson
rename to hw/top_earlgrey/ip/rv_plic/doc/autogen/rv_plic.hjson


diff --git a/hw/top_earlgrey/rtl/rv_plic.sv b/hw/top_earlgrey/ip/rv_plic/rtl/autogen/rv_plic.sv
similarity index 100%
rename from hw/top_earlgrey/rtl/rv_plic.sv
rename to hw/top_earlgrey/ip/rv_plic/rtl/autogen/rv_plic.sv


diff --git a/hw/top_earlgrey/rtl/rv_plic_reg_pkg.sv b/hw/top_earlgrey/ip/rv_plic/rtl/autogen/rv_plic_reg_pkg.sv
similarity index 100%
rename from hw/top_earlgrey/rtl/rv_plic_reg_pkg.sv
rename to hw/top_earlgrey/ip/rv_plic/rtl/autogen/rv_plic_reg_pkg.sv


diff --git a/hw/top_earlgrey/rtl/rv_plic_reg_top.sv b/hw/top_earlgrey/ip/rv_plic/rtl/autogen/rv_plic_reg_top.sv
similarity index 100%
rename from hw/top_earlgrey/rtl/rv_plic_reg_top.sv
rename to hw/top_earlgrey/ip/rv_plic/rtl/autogen/rv_plic_reg_top.sv


diff --git a/hw/top_earlgrey/doc/xbar_main.gen.hjson b/hw/top_earlgrey/ip/xbar/doc/xbar_main.gen.hjson
similarity index 100%
rename from hw/top_earlgrey/doc/xbar_main.gen.hjson
rename to hw/top_earlgrey/ip/xbar/doc/xbar_main.gen.hjson


diff --git a/hw/top_earlgrey/dv/xbar_main_bind.sv b/hw/top_earlgrey/ip/xbar/dv/autogen/xbar_main_bind.sv
similarity index 100%
rename from hw/top_earlgrey/dv/xbar_main_bind.sv
rename to hw/top_earlgrey/ip/xbar/dv/autogen/xbar_main_bind.sv


diff --git a/hw/top_earlgrey/rtl/tl_main_pkg.sv b/hw/top_earlgrey/ip/xbar/rtl/autogen/tl_main_pkg.sv
similarity index 100%
rename from hw/top_earlgrey/rtl/tl_main_pkg.sv
rename to hw/top_earlgrey/ip/xbar/rtl/autogen/tl_main_pkg.sv


diff --git a/hw/top_earlgrey/rtl/xbar_main.sv b/hw/top_earlgrey/ip/xbar/rtl/autogen/xbar_main.sv
similarity index 100%
rename from hw/top_earlgrey/rtl/xbar_main.sv
rename to hw/top_earlgrey/ip/xbar/rtl/autogen/xbar_main.sv


diff --git a/hw/top_earlgrey/rtl/top_earlgrey.f b/hw/top_earlgrey/rtl/top_earlgrey.f
deleted file mode 100644
index 6985ee8..0000000
--- a/hw/top_earlgrey/rtl/top_earlgrey.f
+++ /dev/null

@@ -1,3 +0,0 @@
-../rtl/tl_main_pkg.sv
-../rtl/tlul_xbar.sv
-../rtl/top_earlgrey.sv

diff --git a/hw/top_earlgrey/top_earlgrey.core b/hw/top_earlgrey/top_earlgrey.core
index 731fb8a..985d86f 100644
--- a/hw/top_earlgrey/top_earlgrey.core
+++ b/hw/top_earlgrey/top_earlgrey.core

@@ -22,11 +22,11 @@
       - lowrisc:ip:flash_ctrl:0.1
       - lowrisc:constants:top_pkg
     files:
-      - rtl/tl_main_pkg.sv
-      - rtl/xbar_main.sv
-      - rtl/rv_plic_reg_pkg.sv
-      - rtl/rv_plic_reg_top.sv
-      - rtl/rv_plic.sv
+      - ip/xbar/rtl/autogen/tl_main_pkg.sv
+      - ip/xbar/rtl/autogen/xbar_main.sv
+      - ip/rv_plic/rtl/autogen/rv_plic_reg_pkg.sv
+      - ip/rv_plic/rtl/autogen/rv_plic_reg_top.sv
+      - ip/rv_plic/rtl/autogen/rv_plic.sv
       - rtl/padctl.sv
       - rtl/top_earlgrey.sv
     file_type: systemVerilogSource

diff --git a/util/topgen.py b/util/topgen.py
index ad931c5..e96c417 100755
--- a/util/topgen.py
+++ b/util/topgen.py

@@ -42,7 +42,7 @@
 
 
 def generate_xbars(top, out_path):
-    xbar_path = out_path / 'doc'
+    xbar_path = out_path / 'ip/xbar/doc'
     xbar_path.mkdir(parents=True, exist_ok=True)
     gencmd = ("// util/topgen.py -t hw/top_earlgrey/doc/top_earlgrey.hjson "
               "-o hw/top_earlgrey/\n\n")
@@ -65,9 +65,9 @@
         except:
             log.error(exceptions.text_error_template().render())
 
-        rtl_path = out_path / 'rtl'
+        rtl_path = out_path / 'ip/xbar/rtl/autogen'
         rtl_path.mkdir(parents=True, exist_ok=True)
-        dv_path = out_path / 'dv'
+        dv_path = out_path / 'ip/xbar/dv/autogen'
         dv_path.mkdir(parents=True, exist_ok=True)
 
         rtl_filename = "xbar_%s.sv" % (xbar.name)
@@ -97,9 +97,9 @@
     # Define target path
     #   rtl: rv_plic.sv & rv_plic_reg_pkg.sv & rv_plic_reg_top.sv
     #   doc: rv_plic.hjson
-    rtl_path = out_path / 'rtl'
+    rtl_path = out_path / 'ip/rv_plic/rtl/autogen'
     rtl_path.mkdir(parents=True, exist_ok=True)
-    doc_path = out_path / 'doc'
+    doc_path = out_path / 'ip/rv_plic/doc/autogen'
     doc_path.mkdir(parents=True, exist_ok=True)
 
     # Generating IP top module script is not generalized yet.
@@ -309,7 +309,8 @@
         # It needs to run up to amend_interrupt in merge_top function
         # then creates rv_plic.hjson then run xbar generation.
         hjson_dir = Path(args.topcfg).parent
-        ips.append(hjson_dir / 'rv_plic.hjson')
+        rv_plic_hjson = hjson_dir.parent / 'ip/rv_plic/doc/autogen/rv_plic.hjson'
+        ips.append(rv_plic_hjson)
 
         # load hjson and pass validate from reggen
         try: