hw/ip/spi_device/data/spi_device_testplan.hjson - 3p/lowrisc/opentitan - Git at Google

 // Copyright lowRISC contributors.
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 {
   name: "spi_device"
   import_testplans: ["hw/dv/tools/dvsim/testplans/csr_testplan.hjson",
                      "hw/dv/tools/dvsim/testplans/mem_testplan.hjson",
                      "hw/dv/tools/dvsim/testplans/alert_test_testplan.hjson",
                      "hw/dv/tools/dvsim/testplans/intr_test_testplan.hjson",
                      "hw/dv/tools/dvsim/testplans/tl_device_access_types_testplan.hjson",
                      "spi_device_sec_cm_testplan.hjson"]
   testpoints: [
     {
       name: smoke
       desc: '''
             Use default SRAM fifo setting. Seq:
             - Write a word data to TX memory and update wptr
             - Send a word SPI transfer
             - Read a word data from RX memory and update rptr
             - Compare the data and check no pending data in SRAM FIFO
             - Repeat above steps'''
       milestone: V1
       tests: ["spi_device_smoke"]
     }
     {
       name: base_random_seq
       desc: '''
             Create 3 parallel threads
             - Write random data to TX memory unless fifo is full
             - Send SPI transfer unless TX is empty or RX is full
             - Read RX memory unless RX is empty'''
       milestone: V2
       tests: ["spi_device_txrx"]
     }
     {
       name: fifo_full
       desc: '''
             Increase the chance to have fifo full by following
             - Reduce delay to write TX memory
             - Increase delay to read RX memory'''
       milestone: V2
       tests: ["spi_device_fifo_full"]
     }
     {
       name: fifo_underflow_overflow
       desc: '''
             Override spi_device_txrx_vseq to send SPI transfer without checking TX/RX fifo, note:
             - When TX is underflow, SW shouldn't update wptr if spi isn't idle, otherwise, spi may
               send mis-aligned data
             - When RX is overflow, data will be lost and if SW update rptr, received data may be
               mis-aligned
             - Ensure underflow/overflow is triggered correctly'''
       milestone: V2
       tests: ["spi_device_fifo_underflow_overflow"]
     }
     {
       name: dummy_sck_and_dummy_csb
       desc: '''
             Drive dummy sck without csb or drive dummy csb without sck, and test no impact on the
             design'''
       milestone: V2
       tests: ["spi_device_dummy_item_extra_dly"]
     }
     {
       name: extra_delay_on_spi
       desc: '''
             Add extra delay between spi clock edge or extra delay between 2 words data
             This is to test host pause transfer for a while without turning off csb and then stream
             in data again'''
       milestone: V2
       tests: ["spi_device_dummy_item_extra_dly"]
     }
     {
       name: tx_async_fifo_reset
       desc: '''
             Reset TX async fifo when SPI interface is idle

             - Fill TX SRAM FIFO with some data, which will be transfered to TX async FIFO
             - Write 0 into read and write point of TX SRAM FIFO
             - Program `rst_txfifo` to reset the async FIFO
             - Check `async_fifo_level.txlvl` is 0
             - Fill TX SRAM FIFO with some other data and enable SPI transfer
             - Check SPI device sends and receives the correct data
             '''
       milestone: V2
       tests: ["spi_device_tx_async_fifo_reset"]
     }
     {
       name: rx_async_fifo_reset
       desc: '''
             Reset RX async fifo when SPI interface is idle

             - Configure RX SRAM FIFO with a small size, so that it's easy to fill up
             - Start SPI transfers to fill up the RX SRAM FIFO and at least part of the RX async
               FIFO
             - Program `rst_rxfifo` to reset the async FIFO
             - Check `async_fifo_level.rxlvl` is 0
             - Write 0 into read and write point of RX SRAM FIFO
             - Fill TX SRAM FIFO with some other data and start another SPI transfers
             - Check SPI device sends and receives the correct data
             '''
       milestone: V2
       tests: ["spi_device_rx_async_fifo_reset"]
     }
     {
       name: interrupts
       desc: '''
             Test all supported interrupts:
             - tx/rx lvl
             - rx full
             - rx error
             - overflow/underflow'''
       milestone: V2
       tests: ["spi_device_intr"]
     }
     {
       name: abort
       desc: '''
             - Fill TX FIFO without host traffic
             - Issue Abort to control register
             - Poll until abort_done in status register
             - TBD additional checking
             '''
       milestone: V2
       tests: ["spi_device_abort"]
     }
     {
       name: byte_transfer_on_spi
       desc: '''send spi transfer on byte granularity, and make sure the timer never expires'''
       milestone: V2
       tests: ["spi_device_byte_transfer"]
     }
     {
       name: rx_timeout
       desc: '''
             - Send spi transfer on byte granularity, and timer may expires
             - Only check data in sequence level when timer expires. Monitor and scoreboard don't
               model the timer feature
             - Note: Timeout only for RX'''
       milestone: V2
       tests: ["spi_device_rx_timeout"]
     }
     {
       name: bit_transfer_on_spi
       desc: '''
             Send spi transfer on bit granularity
             - If TX drives < 7 bits, this byte will be sent in next CSB.
             - If TX drives 7 bits and set CSB to high, this byte won't be sent in next CSB'''
       milestone: V2
       tests: ["spi_device_bit_transfer"]
     }
     {
       name: extreme_fifo_setting
       desc: '''Set fifo size to 4 bytes(minimum), 2k-4bytes(maximum) and others'''
       milestone: V2
       tests: ["spi_device_extreme_fifo_size"]
     }
     {
       name: perf
       desc: '''Run spi_device_fifi_full_vseq with very small delays'''
       milestone: V2
       tests: ["spi_device_perf"]
     }
     {
       name: tpm_read
       desc: '''
             - Set TPM_CFG.TPM_MODE to 0 and set TPM_CFG.EN.
             - Randomise other fields in TPM_CFG.
             - Assert the tpm_csb.
             - Send TPM read command over the SPI bus with a randomised address.
             - Check TPM_CMD_ADDR.
             - Confirm FIFO behaviour dictated by TPM_CFG.tpm_mode.
             - Check TPM_STATUS.cmdaddr_notempty and INTR_STATE.tpm_header_notempty, they should be asserted if hw_reg_dis == 0.
             - If hw_reg_dis == 0, the data is returned to the host via return-by-HW register, else the data is returned via read FIFO.
             - Confirm that the TPM submodule sends WAIT until the read FIFO is available.
             - Check the read FIFO.
             - When available, confirm that the TPM submodule sends START followed by the register value.
             - Compare this value with the expected value.'''
       milestone: V2
       tests: ["spi_device_tpm_read"]
     }
     {
       name: tpm_write
       desc: '''
             - Set TPM_CFG.TPM_MODE to 0 and set TPM_CFG.EN.
             - Randomise other fields in TPM_CFG.
             - Assert the tpm_csb.
             - Send TPM write command with a randomised address.
             - Check TPM_CMD_ADDR and write FIFO.
             - Check TPM_STATUS.cmdaddr_notempty and INTR_STATE.tpm_header_notempty.
             - Based on FIFO status, check SPI bus to confirm WAIT or START sent.
             - Check that the TPM submodule accepts write data without the WAIT state if the write FIFO is empty.
             - Otherwise, check WAIT until the write FIFO becomes available (empty).'''
       milestone: V2
       tests: ["spi_device_tpm_write"]
     }
     {
       name: tpm_locality
       desc: '''
             - Make transactions of varying locality to the tpm submodule.
             - Ensure that the data returned is correct for the given locality.
             - Randomise TPM_CFG.invalid_locality and confirm response.'''
       milestone: V2
       tests: ["spi_device_tpm_locality"]
     }
     {
       name: pass_cmd_filtering
       desc: '''
             - Randomize command opcode.
             - Configure unused CMD_INFO reg with new opcode and set it to valid.
             - Check opcode and address are passing through.
             - Configure filter bit corresponding to opcode to 1.
             - Check only opcode is passing through.
             - Set filter bit back to 0.
             - Check opcode and address are passing through again.'''
       milestone: V2
       tests: ["spi_device_pass_cmd_filtering"]
     }
     {
       name: pass_addr_translation
       desc: '''
             - Randomize command opcode.
             - Configure unused CMD_INFO reg with new opcode and set it to valid.
             - Enable address translation for given command.
             - Configure address translation bits.
             - Check proper address translation is applied.
             - Disable address translation for given command.
             - Check address is now passing unchanged.'''
       milestone: V2
       tests: ["spi_device_pass_addr_translation"]
     }
     {
       name: pass_payload_translation
       desc: '''
             - Configure program or write_status command.
             - Enable payload translation for given command.
             - Configure payload translation bits.
             - Check proper payload translation is applied.
             - Disable payload translation for given command.
             - Check payload is now passing unchanged.'''
       milestone: V2
       tests: ["spi_device_pass_data_translation"]
     }
     {
       name: cmd_info_slots
       desc: '''
             - Configure first 5 slots according to required configuration.
             - Configure next 6 slots for read commands
             - Randomize configuration of the remaining 13 cmd info slots.
             - Issue commands with various opcodes enabled in info slots.
             - Check proper command propagation.
             - Disable some cmd info slots.
             - Check no propagation of disabled commands.'''
       milestone: V2
       tests: []
     }
     {
       name: cmd_read_status
       desc: '''
             - Configure proper read status command info slot.
             - Issue read status command.
             - Check propagation of read status command.
             - Initiate response to the read status.
             - Check proper reception of response.'''
       milestone: V2
       tests: []
     }
     {
       name: cmd_read_jedec
       desc: '''
             - Configure proper read jedec command info slot.
             - Issue read jedec command.
             - Check propagation of read jedec command.
             - Initiate response to the read jedec.
             - Check proper reception of response.'''
       milestone: V2
       tests: []
     }
     {
       name: cmd_read_sfdp
       desc: '''
             - Configure proper read sfdp command info slot.
             - Issue read sfdp command.
             - Check propagation of read sfdp command.
             - Initiate response to the read sfdp.
             - Check proper reception of response.'''
       milestone: V2
       tests: []
     }
     {
       name: cmd_fast_read
       desc: '''
             - Configure proper fast read command info slot.
             - Issue fast read command.
             - Check propagation of fast read command.
             - Initiate response to the fast read.
             - Check proper reception of response.'''
       milestone: V2
       tests: []
     }
     {
       name: flash_cmd_upload
       desc: '''
             - Configure flash mode.
             - Configure cmd info slots.
             - Set upload to 1 for some of 13 non fixed cmd info slots.
             - Host should poll busy field status to check if command is done.
             - Issue next command upload and poll busy status again.'''
       milestone: V2
       tests: []
     }
     {
       name: mailbox_command
       desc: '''
             - Configure cmd info slots.
             - Issue one of predefined read command targeting mailbox space.
             - Check response to read command.
             - Check if command is processed internally.'''
       milestone: V2
       tests: []
     }
     {
       name: mailbox_cross_outside_command
       desc: '''
             - Configure cmd info slots.
             - Issue one of predefined read command targeting mailbox space.
             - Command should start inside mailbox space and cross into read space.
             - Command should be blocked.'''//TODO Clarify if data returned if crossing boundary
       milestone: V2
       tests: []
     }
     {
       name: mailbox_cross_inside_command
       desc: '''
             - Configure cmd info slots.
             - Issue one of predefined read command targeting read space outside mailbox space.
             - Command should start outside mailbox space and cross into mailbox space.
             - Command should be blocked.'''//TODO Clarify if data returned if crossing boundary
       milestone: V2
       tests: []
     }
     {
       name: cmd_read_buffer
       desc: '''
             - Configure device in flash or passthrough mode.
             - SW updates read buffer contents.
             - Issue read command.
             - Check proper read data.
             - Issue new read command that crosses read buffer boundary.
             - Behavior on crossing uncertain //TODO Clarify spec on this
             - Check internal buffer index bit.'''
       milestone: V2
       tests: []
     }
     {
       name: cmd_dummy_cycle
       desc: '''
             - Configure cmd info slots.
             - Configure dummy cycle of read commands to non default value.
             - For single mode allowed dummy cycle is 7.
             - For dual mode allowed dummy cycle is 3 and 7.
             - For quad mode allowed dummy cycle is 1, 3, 5 and 7.
             - Check return data timing for configured commands.
             - Check proper read data.
             - Issue new read command that crosses read buffer boundary.
             - Check internal buffer index bit.'''
       milestone: V2
       tests: []
     }
     {
       name: quad_spi
       desc: '''
             - Configure passthrough or flash mode.
             - Configure cmd info slots.
             - Configure quad mode.
             - Issue supported command.
             - Check data on all four lines.'''
       milestone: V2
       tests: []
     }
     {
       name: dual_spi
       desc: '''
             - Configure passthrough or flash mode.
             - Configure cmd info slots.
             - Configure dual mode.
             - Issue supported command.
             - Check data on both lines.'''
       milestone: V2
       tests: []
     }
     {
       name: 4b_3b_feature
       desc: '''
             - Configure passthrough or flash mode.
             - Configure command info slots.
             - Configure different values for 4B/3B.
             - Randomize configuration of EN4B and EX4B register fields.
             - Issue supported command with required address.
             - Check proper address propagation.'''
       milestone: V2
       tests: []
     }
   ]
   covergroups: [
     {
       name: spi_device_tpm_all_modes_cg
       desc: '''
             Cover every combination of all possible modes:
             - All modes perform tx/rx interleaved tpm tx/rx.'''
     }
     {
       name: spi_device_tpm_states_cg
       desc: '''
             Cover all tpm states on the SPI bus (WAIT, INVALID, ETC).'''
     }
     {
       name: spi_device_fifo_fsm_cg
       desc: '''
             Cover all fsm states for RX/TX FIFO.'''
     }
     {
       name: spi_device_abort_all_cg
       desc: '''
             Cover the correct abort functionality for all modes.

             TODO: Functionality of abort to be clarified.'''
     }
     {
       name: spi_device_txrx_order_cg
       desc: '''
             Verify that data being tx/rx is valid regardless of bit order and that the functionality behaves as expected:

             Cover all configurations of rx/tx order in SPI_DEVICE.CFG for all valid modes.'''
     }
     {
       name: spi_device_sram_size_cg
       desc: '''
             Cover the SramAw local parameter to confirm all sizes 1 - 32kB.'''
     }
     {
       name: spi_device_sck_config_cg
       desc: '''
             Cover all combinations of SPI_DEVICE.CFG.CPOL and SPI_DEVICE.CFG.CPHA.

             Cover valid combinations for each mode.'''
     }
     {
       name: spi_device_pass_addr_swap_cg
       desc: '''
             Cover all bits enable for address translation.
             Cover all bits values for address translation.'''
     }
     {
       name: spi_device_pass_payload_swap_cg
       desc: '''
             Cover all bits enable for payload translation.
             Cover all bits values for payload translation.'''
     }
     {
       name: spi_device_pass_cmd_filter_cg
       desc: '''
             Cover all possible bits for command filter.
             Every opcode should be enabled and filtering checked.'''
     }
     {
       name: spi_device_cmd_info_cg
       desc: '''
             Cover all opcode enabled in cmd info.
             Cover all payload direction.
             Cover all address modes.
             Cover addr swap enable.
             Cover payload swap enable.
             Cover upload enable.
             Cover busy enable.
             Cover all dummy sizes.
             Cover all payload enables.
             This is not configuration coverage, cover only if we have relevant
             transaction with opcode configured and enabled in cmd_info slot.

             TODO: Consider relevant crosses between opcode and other items.'''
     }
     {
       name: spi_device_payload_size_cg
       desc: '''
             Cover supported payload sizes for IN transactions.
             Cover supported payload sizes for OUT transactions.
             Cover upload transaction payload size.
             Cover payload size of upload transaction exceeds 256B limit (wrap around).'''
     }
     {
       name: spi_device_read_commands_cg
       desc: '''
             Cover read status commands.
             Cover read JEDEC command.
             Cover read SFDP command.
             Cover all other read commands configurable in slots up to 10.
             Cover dummy cycle for all read commands.
             Cover INTERCEPT_EN with all applicable read commands.'''
     }
     {
       name: spi_device_mailbox_cg
       desc: '''
             Cover commands targeting mailbox space.
             Cover command starting in buffer overlapping with mailbox.
             Cover command starting in mailbox comming outside mailbox space.'''
     }
     {
       name: spi_device_4B_address_management_cg
       desc: '''
             Cover all possible combinations of EN4B and EX4B.
             Cross with various read commands.'''
     }
     {
       name: spi_device_buffer_boundary_cg
       desc: '''
             Cover buffer boundary crossing (buffer flip).'''
     }
     {
       name: spi_device_lanes_cg
       desc: '''
             Cover out commands that use dual mode.
             Cover out commands that use quad mode.
             Cross dual and quad modes with flash/passthrough mode.'''
     }
   ]
 }
	// Copyright lowRISC contributors.
	// Licensed under the Apache License, Version 2.0, see LICENSE for details.
	// SPDX-License-Identifier: Apache-2.0
	{
	name: "spi_device"
	import_testplans: ["hw/dv/tools/dvsim/testplans/csr_testplan.hjson",
	"hw/dv/tools/dvsim/testplans/mem_testplan.hjson",
	"hw/dv/tools/dvsim/testplans/alert_test_testplan.hjson",
	"hw/dv/tools/dvsim/testplans/intr_test_testplan.hjson",
	"hw/dv/tools/dvsim/testplans/tl_device_access_types_testplan.hjson",
	"spi_device_sec_cm_testplan.hjson"]
	testpoints: [
	{
	name: smoke
	desc: '''
	Use default SRAM fifo setting. Seq:
	- Write a word data to TX memory and update wptr
	- Send a word SPI transfer
	- Read a word data from RX memory and update rptr
	- Compare the data and check no pending data in SRAM FIFO
	- Repeat above steps'''
	milestone: V1
	tests: ["spi_device_smoke"]
	}
	{
	name: base_random_seq
	desc: '''
	Create 3 parallel threads
	- Write random data to TX memory unless fifo is full
	- Send SPI transfer unless TX is empty or RX is full
	- Read RX memory unless RX is empty'''
	milestone: V2
	tests: ["spi_device_txrx"]
	}
	{
	name: fifo_full
	desc: '''
	Increase the chance to have fifo full by following
	- Reduce delay to write TX memory
	- Increase delay to read RX memory'''
	milestone: V2
	tests: ["spi_device_fifo_full"]
	}
	{
	name: fifo_underflow_overflow
	desc: '''
	Override spi_device_txrx_vseq to send SPI transfer without checking TX/RX fifo, note:
	- When TX is underflow, SW shouldn't update wptr if spi isn't idle, otherwise, spi may
	send mis-aligned data
	- When RX is overflow, data will be lost and if SW update rptr, received data may be
	mis-aligned
	- Ensure underflow/overflow is triggered correctly'''
	milestone: V2
	tests: ["spi_device_fifo_underflow_overflow"]
	}
	{
	name: dummy_sck_and_dummy_csb
	desc: '''
	Drive dummy sck without csb or drive dummy csb without sck, and test no impact on the
	design'''
	milestone: V2
	tests: ["spi_device_dummy_item_extra_dly"]
	}
	{
	name: extra_delay_on_spi
	desc: '''
	Add extra delay between spi clock edge or extra delay between 2 words data
	This is to test host pause transfer for a while without turning off csb and then stream
	in data again'''
	milestone: V2
	tests: ["spi_device_dummy_item_extra_dly"]
	}
	{
	name: tx_async_fifo_reset
	desc: '''
	Reset TX async fifo when SPI interface is idle

	- Fill TX SRAM FIFO with some data, which will be transfered to TX async FIFO
	- Write 0 into read and write point of TX SRAM FIFO
	- Program `rst_txfifo` to reset the async FIFO
	- Check `async_fifo_level.txlvl` is 0
	- Fill TX SRAM FIFO with some other data and enable SPI transfer
	- Check SPI device sends and receives the correct data
	'''
	milestone: V2
	tests: ["spi_device_tx_async_fifo_reset"]
	}
	{
	name: rx_async_fifo_reset
	desc: '''
	Reset RX async fifo when SPI interface is idle

	- Configure RX SRAM FIFO with a small size, so that it's easy to fill up
	- Start SPI transfers to fill up the RX SRAM FIFO and at least part of the RX async
	FIFO
	- Program `rst_rxfifo` to reset the async FIFO
	- Check `async_fifo_level.rxlvl` is 0
	- Write 0 into read and write point of RX SRAM FIFO
	- Fill TX SRAM FIFO with some other data and start another SPI transfers
	- Check SPI device sends and receives the correct data
	'''
	milestone: V2
	tests: ["spi_device_rx_async_fifo_reset"]
	}
	{
	name: interrupts
	desc: '''
	Test all supported interrupts:
	- tx/rx lvl
	- rx full
	- rx error
	- overflow/underflow'''
	milestone: V2
	tests: ["spi_device_intr"]
	}
	{
	name: abort
	desc: '''
	- Fill TX FIFO without host traffic
	- Issue Abort to control register
	- Poll until abort_done in status register
	- TBD additional checking
	'''
	milestone: V2
	tests: ["spi_device_abort"]
	}
	{
	name: byte_transfer_on_spi
	desc: '''send spi transfer on byte granularity, and make sure the timer never expires'''
	milestone: V2
	tests: ["spi_device_byte_transfer"]
	}
	{
	name: rx_timeout
	desc: '''
	- Send spi transfer on byte granularity, and timer may expires
	- Only check data in sequence level when timer expires. Monitor and scoreboard don't
	model the timer feature
	- Note: Timeout only for RX'''
	milestone: V2
	tests: ["spi_device_rx_timeout"]
	}
	{
	name: bit_transfer_on_spi
	desc: '''
	Send spi transfer on bit granularity
	- If TX drives < 7 bits, this byte will be sent in next CSB.
	- If TX drives 7 bits and set CSB to high, this byte won't be sent in next CSB'''
	milestone: V2
	tests: ["spi_device_bit_transfer"]
	}
	{
	name: extreme_fifo_setting
	desc: '''Set fifo size to 4 bytes(minimum), 2k-4bytes(maximum) and others'''
	milestone: V2
	tests: ["spi_device_extreme_fifo_size"]
	}
	{
	name: perf
	desc: '''Run spi_device_fifi_full_vseq with very small delays'''
	milestone: V2
	tests: ["spi_device_perf"]
	}
	{
	name: tpm_read
	desc: '''
	- Set TPM_CFG.TPM_MODE to 0 and set TPM_CFG.EN.
	- Randomise other fields in TPM_CFG.
	- Assert the tpm_csb.
	- Send TPM read command over the SPI bus with a randomised address.
	- Check TPM_CMD_ADDR.
	- Confirm FIFO behaviour dictated by TPM_CFG.tpm_mode.
	- Check TPM_STATUS.cmdaddr_notempty and INTR_STATE.tpm_header_notempty, they should be asserted if hw_reg_dis == 0.
	- If hw_reg_dis == 0, the data is returned to the host via return-by-HW register, else the data is returned via read FIFO.
	- Confirm that the TPM submodule sends WAIT until the read FIFO is available.
	- Check the read FIFO.
	- When available, confirm that the TPM submodule sends START followed by the register value.
	- Compare this value with the expected value.'''
	milestone: V2
	tests: ["spi_device_tpm_read"]
	}
	{
	name: tpm_write
	desc: '''
	- Set TPM_CFG.TPM_MODE to 0 and set TPM_CFG.EN.
	- Randomise other fields in TPM_CFG.
	- Assert the tpm_csb.
	- Send TPM write command with a randomised address.
	- Check TPM_CMD_ADDR and write FIFO.
	- Check TPM_STATUS.cmdaddr_notempty and INTR_STATE.tpm_header_notempty.
	- Based on FIFO status, check SPI bus to confirm WAIT or START sent.
	- Check that the TPM submodule accepts write data without the WAIT state if the write FIFO is empty.
	- Otherwise, check WAIT until the write FIFO becomes available (empty).'''
	milestone: V2
	tests: ["spi_device_tpm_write"]
	}
	{
	name: tpm_locality
	desc: '''
	- Make transactions of varying locality to the tpm submodule.
	- Ensure that the data returned is correct for the given locality.
	- Randomise TPM_CFG.invalid_locality and confirm response.'''
	milestone: V2
	tests: ["spi_device_tpm_locality"]
	}
	{
	name: pass_cmd_filtering
	desc: '''
	- Randomize command opcode.
	- Configure unused CMD_INFO reg with new opcode and set it to valid.
	- Check opcode and address are passing through.
	- Configure filter bit corresponding to opcode to 1.
	- Check only opcode is passing through.
	- Set filter bit back to 0.
	- Check opcode and address are passing through again.'''
	milestone: V2
	tests: ["spi_device_pass_cmd_filtering"]
	}
	{
	name: pass_addr_translation
	desc: '''
	- Randomize command opcode.
	- Configure unused CMD_INFO reg with new opcode and set it to valid.
	- Enable address translation for given command.
	- Configure address translation bits.
	- Check proper address translation is applied.
	- Disable address translation for given command.
	- Check address is now passing unchanged.'''
	milestone: V2
	tests: ["spi_device_pass_addr_translation"]
	}
	{
	name: pass_payload_translation
	desc: '''
	- Configure program or write_status command.
	- Enable payload translation for given command.
	- Configure payload translation bits.
	- Check proper payload translation is applied.
	- Disable payload translation for given command.
	- Check payload is now passing unchanged.'''
	milestone: V2
	tests: ["spi_device_pass_data_translation"]
	}
	{
	name: cmd_info_slots
	desc: '''
	- Configure first 5 slots according to required configuration.
	- Configure next 6 slots for read commands
	- Randomize configuration of the remaining 13 cmd info slots.
	- Issue commands with various opcodes enabled in info slots.
	- Check proper command propagation.
	- Disable some cmd info slots.
	- Check no propagation of disabled commands.'''
	milestone: V2
	tests: []
	}
	{
	name: cmd_read_status
	desc: '''
	- Configure proper read status command info slot.
	- Issue read status command.
	- Check propagation of read status command.
	- Initiate response to the read status.
	- Check proper reception of response.'''
	milestone: V2
	tests: []
	}
	{
	name: cmd_read_jedec
	desc: '''
	- Configure proper read jedec command info slot.
	- Issue read jedec command.
	- Check propagation of read jedec command.
	- Initiate response to the read jedec.
	- Check proper reception of response.'''
	milestone: V2
	tests: []
	}
	{
	name: cmd_read_sfdp
	desc: '''
	- Configure proper read sfdp command info slot.
	- Issue read sfdp command.
	- Check propagation of read sfdp command.
	- Initiate response to the read sfdp.
	- Check proper reception of response.'''
	milestone: V2
	tests: []
	}
	{
	name: cmd_fast_read
	desc: '''
	- Configure proper fast read command info slot.
	- Issue fast read command.
	- Check propagation of fast read command.
	- Initiate response to the fast read.
	- Check proper reception of response.'''
	milestone: V2
	tests: []
	}
	{
	name: flash_cmd_upload
	desc: '''
	- Configure flash mode.
	- Configure cmd info slots.
	- Set upload to 1 for some of 13 non fixed cmd info slots.
	- Host should poll busy field status to check if command is done.
	- Issue next command upload and poll busy status again.'''
	milestone: V2
	tests: []
	}
	{
	name: mailbox_command
	desc: '''
	- Configure cmd info slots.
	- Issue one of predefined read command targeting mailbox space.
	- Check response to read command.
	- Check if command is processed internally.'''
	milestone: V2
	tests: []
	}
	{
	name: mailbox_cross_outside_command
	desc: '''
	- Configure cmd info slots.
	- Issue one of predefined read command targeting mailbox space.
	- Command should start inside mailbox space and cross into read space.
	- Command should be blocked.'''//TODO Clarify if data returned if crossing boundary
	milestone: V2
	tests: []
	}
	{
	name: mailbox_cross_inside_command
	desc: '''
	- Configure cmd info slots.
	- Issue one of predefined read command targeting read space outside mailbox space.
	- Command should start outside mailbox space and cross into mailbox space.
	- Command should be blocked.'''//TODO Clarify if data returned if crossing boundary
	milestone: V2
	tests: []
	}
	{
	name: cmd_read_buffer
	desc: '''
	- Configure device in flash or passthrough mode.
	- SW updates read buffer contents.
	- Issue read command.
	- Check proper read data.
	- Issue new read command that crosses read buffer boundary.
	- Behavior on crossing uncertain //TODO Clarify spec on this
	- Check internal buffer index bit.'''
	milestone: V2
	tests: []
	}
	{
	name: cmd_dummy_cycle
	desc: '''
	- Configure cmd info slots.
	- Configure dummy cycle of read commands to non default value.
	- For single mode allowed dummy cycle is 7.
	- For dual mode allowed dummy cycle is 3 and 7.
	- For quad mode allowed dummy cycle is 1, 3, 5 and 7.
	- Check return data timing for configured commands.
	- Check proper read data.
	- Issue new read command that crosses read buffer boundary.
	- Check internal buffer index bit.'''
	milestone: V2
	tests: []
	}
	{
	name: quad_spi
	desc: '''
	- Configure passthrough or flash mode.
	- Configure cmd info slots.
	- Configure quad mode.
	- Issue supported command.
	- Check data on all four lines.'''
	milestone: V2
	tests: []
	}
	{
	name: dual_spi
	desc: '''
	- Configure passthrough or flash mode.
	- Configure cmd info slots.
	- Configure dual mode.
	- Issue supported command.
	- Check data on both lines.'''
	milestone: V2
	tests: []
	}
	{
	name: 4b_3b_feature
	desc: '''
	- Configure passthrough or flash mode.
	- Configure command info slots.
	- Configure different values for 4B/3B.
	- Randomize configuration of EN4B and EX4B register fields.
	- Issue supported command with required address.
	- Check proper address propagation.'''
	milestone: V2
	tests: []
	}
	]
	covergroups: [
	{
	name: spi_device_tpm_all_modes_cg
	desc: '''
	Cover every combination of all possible modes:
	- All modes perform tx/rx interleaved tpm tx/rx.'''
	}
	{
	name: spi_device_tpm_states_cg
	desc: '''
	Cover all tpm states on the SPI bus (WAIT, INVALID, ETC).'''
	}
	{
	name: spi_device_fifo_fsm_cg
	desc: '''
	Cover all fsm states for RX/TX FIFO.'''
	}
	{
	name: spi_device_abort_all_cg
	desc: '''
	Cover the correct abort functionality for all modes.

	TODO: Functionality of abort to be clarified.'''
	}
	{
	name: spi_device_txrx_order_cg
	desc: '''
	Verify that data being tx/rx is valid regardless of bit order and that the functionality behaves as expected:

	Cover all configurations of rx/tx order in SPI_DEVICE.CFG for all valid modes.'''
	}
	{
	name: spi_device_sram_size_cg
	desc: '''
	Cover the SramAw local parameter to confirm all sizes 1 - 32kB.'''
	}
	{
	name: spi_device_sck_config_cg
	desc: '''
	Cover all combinations of SPI_DEVICE.CFG.CPOL and SPI_DEVICE.CFG.CPHA.

	Cover valid combinations for each mode.'''
	}
	{
	name: spi_device_pass_addr_swap_cg
	desc: '''
	Cover all bits enable for address translation.
	Cover all bits values for address translation.'''
	}
	{
	name: spi_device_pass_payload_swap_cg
	desc: '''
	Cover all bits enable for payload translation.
	Cover all bits values for payload translation.'''
	}
	{
	name: spi_device_pass_cmd_filter_cg
	desc: '''
	Cover all possible bits for command filter.
	Every opcode should be enabled and filtering checked.'''
	}
	{
	name: spi_device_cmd_info_cg
	desc: '''
	Cover all opcode enabled in cmd info.
	Cover all payload direction.
	Cover all address modes.
	Cover addr swap enable.
	Cover payload swap enable.
	Cover upload enable.
	Cover busy enable.
	Cover all dummy sizes.
	Cover all payload enables.
	This is not configuration coverage, cover only if we have relevant
	transaction with opcode configured and enabled in cmd_info slot.

	TODO: Consider relevant crosses between opcode and other items.'''
	}
	{
	name: spi_device_payload_size_cg
	desc: '''
	Cover supported payload sizes for IN transactions.
	Cover supported payload sizes for OUT transactions.
	Cover upload transaction payload size.
	Cover payload size of upload transaction exceeds 256B limit (wrap around).'''
	}
	{
	name: spi_device_read_commands_cg
	desc: '''
	Cover read status commands.
	Cover read JEDEC command.
	Cover read SFDP command.
	Cover all other read commands configurable in slots up to 10.
	Cover dummy cycle for all read commands.
	Cover INTERCEPT_EN with all applicable read commands.'''
	}
	{
	name: spi_device_mailbox_cg
	desc: '''
	Cover commands targeting mailbox space.
	Cover command starting in buffer overlapping with mailbox.
	Cover command starting in mailbox comming outside mailbox space.'''
	}
	{
	name: spi_device_4B_address_management_cg
	desc: '''
	Cover all possible combinations of EN4B and EX4B.
	Cross with various read commands.'''
	}
	{
	name: spi_device_buffer_boundary_cg
	desc: '''
	Cover buffer boundary crossing (buffer flip).'''
	}
	{
	name: spi_device_lanes_cg
	desc: '''
	Cover out commands that use dual mode.
	Cover out commands that use quad mode.
	Cross dual and quad modes with flash/passthrough mode.'''
	}
	]
	}