[otbn] Trivial rejig in sim.py

No functional change (insn is None iff was_stalled is True), but this
silences a mypy error, caused by the fact that mypy doesn't know insn
is Non-none if was_stalled is False.

Signed-off-by: Rupert Swarbrick <rswarbrick@lowrisc.org>

hw/ip/otbn/dv/otbnsim/sim/sim.py

diff --git a/hw/ip/otbn/dv/otbnsim/sim/sim.py b/hw/ip/otbn/dv/otbnsim/sim/sim.py
index 7b72a3e..c7c2150 100644
--- a/hw/ip/otbn/dv/otbnsim/sim/sim.py
+++ b/hw/ip/otbn/dv/otbnsim/sim/sim.py
@@ -73,7 +73,7 @@
         self.state.commit()
 
         if verbose:
-            disasm = ('(stall)' if was_stalled
+            disasm = ('(stall)' if insn is None
                       else insn.disassemble(pc_before))
             self._print_trace(disasm, changes)