blob: dbcdb3ad67c203d24de5fe30f1473a64f75fad2b [file] [log] [blame]
From 238c8583aa41156429c890e9761979007fae8be0 Mon Sep 17 00:00:00 2001
From: Greg Chadwick <gac@lowrisc.org>
Date: Wed, 15 Apr 2020 18:39:08 +0100
Subject: [PATCH 3/5] Remove tests that do not pass on OpenTitan
diff --git a/riscv-test-suite/rv32i/Makefrag b/riscv-test-suite/rv32i/Makefrag
index a19fff8..e27b7ac 100644
--- a/riscv-test-suite/rv32i/Makefrag
+++ b/riscv-test-suite/rv32i/Makefrag
@@ -32,8 +32,6 @@ rv32i_sc_tests = \
I-RF_x0-01 \
I-RF_size-01 \
I-RF_width-01 \
- I-MISALIGN_JMP-01 \
- I-MISALIGN_LDST-01 \
I-DELAY_SLOTS-01 \
I-JAL-01 \
I-JALR-01 \
@@ -77,6 +75,11 @@ rv32i_sc_tests = \
I-EBREAK-01 \
I-IO-01 \
+ # These tests are broken due to flaws in riscv-compliance rather than
+ # Ibex/OpenTitan (see https://github.com/lowRISC/ibex/issues/100)
+ #I-MISALIGN_JMP-01
+ #I-MISALIGN_LDST-01
+
rv32i_tests = $(addsuffix .elf, $(rv32i_sc_tests))