[otbn/dv] Add the OTBN sanity test to chip-level DV

Signed-off-by: Philipp Wagner <phw@lowrisc.org>

hw/top_earlgrey/dv/chip_sim_cfg.hjson

diff --git a/hw/top_earlgrey/dv/chip_sim_cfg.hjson b/hw/top_earlgrey/dv/chip_sim_cfg.hjson
index 8c9898c..53c0803 100644
--- a/hw/top_earlgrey/dv/chip_sim_cfg.hjson
+++ b/hw/top_earlgrey/dv/chip_sim_cfg.hjson
@@ -173,6 +173,11 @@
       sw_test: sw/device/tests/flash_ctrl_test
     }
     {
+      name: chip_dif_otbn_sanitytest
+      uvm_test_seq: chip_sw_base_vseq
+      sw_test: sw/device/tests/dif_otbn_sanitytest
+    }
+    {
       name: chip_hmac_sha256_encr
       uvm_test_seq: chip_sw_base_vseq
       sw_test: sw/device/tests/sha256_test