blob: 4490c52d8d93f357e87caad84a878be1df778727 [file] [log] [blame]
// Copyright lowRISC contributors.
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0
-tree *
// Include port toggles of all IOs at these hierarchies.
begin tgl(portsonly)
+module chip_earlgrey_asic
+module ast
+module padring
+moduletree top_earlgrey 2
+moduletree rv_core_ibex 2
end
// Enable full coverage collection on these modules to cover the glue logic.
begin line+cond+fsm+branch+assert
+module chip_earlgrey_asic
+module top_earlgrey
end
// Enable full coverage collection on these modules including their
// sub-hierarchies since they are not pre-verified.
begin line+cond+fsm+branch+assert
+moduletree padring
+moduletree pinmux
+moduletree rv_core_ibex
-tree tb.dut.top_earlgrey.u_rv_core_ibex.u_core
+moduletree rv_plic
+moduletree sensor_ctrl
// Prim_alert/esc pairs are verified in FPV and DV testbenches.
-moduletree prim_alert_sender
-moduletree prim_alert_receiver
-moduletree prim_esc_sender
-moduletree prim_esc_receiver
-moduletree prim_prince // prim_prince is verified in a separate DV environment.
-moduletree prim_lfsr // prim_lfsr is verified in FPV.
end
// TODO: Re-enable tgl(portsonly) on the the excluded prims above in the non-preverified IPs and
// glue logic.
begin tgl(portsonly)
+tree tb.dut.top_earlgrey.u_rv_core_ibex.gen_alert_senders[0].u_alert_sender 1
+tree tb.dut.top_earlgrey.u_rv_core_ibex.gen_alert_senders[1].u_alert_sender 1
+tree tb.dut.top_earlgrey.u_rv_core_ibex.gen_alert_senders[2].u_alert_sender 1
+tree tb.dut.top_earlgrey.u_rv_core_ibex.gen_alert_senders[3].u_alert_sender 1
+tree tb.dut.top_earlgrey.u_rv_core_ibex.u_prim_esc_receiver 1
+tree tb.dut.top_earlgrey.u_pinmux_aon.gen_alert_tx[0].u_prim_alert_sender 1
+tree tb.dut.top_earlgrey.u_rv_plic.gen_alert_tx[0].u_prim_alert_sender 1
+tree tb.dut.top_earlgrey.u_sensor_ctrl.u_prim_fatal_alert_sender 1
+tree tb.dut.top_earlgrey.u_sensor_ctrl.u_prim_recov_alert_sender 1
end