| // Copyright lowRISC contributors. |
| // Licensed under the Apache License, Version 2.0, see LICENSE for details. |
| // SPDX-License-Identifier: Apache-2.0 |
| { |
| name: "riscv_compliance", |
| target_dir: "riscv_compliance", |
| patch_dir: "patches/riscv_compliance", |
| |
| upstream: { |
| url: "https://github.com/riscv/riscv-compliance.git", |
| rev: "master", |
| }, |
| |
| exclude_from_upstream: [ |
| "doc", |
| "spec", |
| "riscv-ovpsim", |
| "riscv-target/Codasip-simulator", |
| "riscv-target/grift", |
| "riscv-target/ibex", |
| "riscv-target/ri5cy", |
| "riscv-target/riscvOVPsim", |
| "riscv-target/rocket", |
| "riscv-target/sail-riscv-c", |
| "riscv-target/sail-riscv-ocaml", |
| "riscv-target/sifive-formal", |
| "riscv-target/spike", |
| "riscv-test-suite/rv32mi", |
| "riscv-test-suite/rv32si", |
| "riscv-test-suite/rv32ua", |
| "riscv-test-suite/rv32uc", |
| "riscv-test-suite/rv32ud", |
| "riscv-test-suite/rv32uf", |
| "riscv-test-suite/rv32ui", |
| "riscv-test-suite/rv64i", |
| "riscv-test-suite/rv64im", |
| // FENCE.I test attemps write to flash memory so doesn't work in OT |
| "riscv-test-suite/rv32Zifencei", |
| ] |
| |
| patch_repo: { |
| url: "https://github.com/lowRISC/riscv-compliance.git", |
| rev_base: "master", |
| rev_patched: "ot", |
| } |
| } |