[dv] Configure dvsim to run tests with mask ROM

This commit:

1. Adds configuration options to the dvsim test running
   environment that can be used to select whether a chip-level test (run
   out of flash) is launched with the test ROM or mask ROM.

2. Renames the dvsim run mode for all chip-level tests run with the
   rest ROM has been from `sw_test_mode` --> `sw_test_mode_test_rom`.

3. Checks-in the Cargo.lock file for the ROM_EXT image signer tool
   (since it is a complete binary), in order to enable reproducible
   builds, which is necessary to run this tool on internet-isolated
   simulation infrastructure.

Signed-off-by: Timothy Trippel <ttrippel@google.com>
diff --git a/.gitignore b/.gitignore
index dfb27aa..c8a177d 100644
--- a/.gitignore
+++ b/.gitignore
@@ -62,6 +62,10 @@
 # Rust Cargo build system files.
 Cargo.lock
 sw/host/**/target
+# We check this in to ensure the signing tool is built in a reproducible way
+# under meson, however, once the signing tool is integrated into opentitantool,
+# which is built with Bazel, this can be removed. See lowrisc/opentitan#10465.
+!sw/host/rom_ext_image_tools/signer/Cargo.lock
 
 # Bazel-related cache and output directories
 bazel-*
diff --git a/hw/top_earlgrey/dv/chip_mask_rom_tests.hjson b/hw/top_earlgrey/dv/chip_mask_rom_tests.hjson
index 458efbf..85f6b4e 100644
--- a/hw/top_earlgrey/dv/chip_mask_rom_tests.hjson
+++ b/hw/top_earlgrey/dv/chip_mask_rom_tests.hjson
@@ -7,18 +7,29 @@
 
   # Note: Please maintain alphabetical order.
   tests: [
+    // Mask ROM func tests to be run with test ROM.
     {
-      name: chip_mask_rom_keymgr_functest
+      name: chip_sw_mask_rom_keymgr_functest
       uvm_test_seq: chip_sw_base_vseq
       sw_images: ["sw/device/silicon_creator/testing/sw_silicon_creator_lib_driver_keymgr_functest:1"]
-      en_run_modes: ["sw_test_mode"]
+      en_run_modes: ["sw_test_mode_test_rom"]
       run_opts: ["+sw_test_timeout_ns=5000000"]
     }
+
+    // Chip-level tests to be run with mask ROM, i.e., ROM_EXT tests.
+    // Note, these tests will be signed with test keys, prior to loading.
+    {
+      name: chip_sw_mask_rom_uart_smoketest_signed
+      uvm_test_seq: chip_sw_base_vseq
+      sw_images: ["sw/device/tests/rom_ext_uart_smoketest:1:signed"]
+      en_run_modes: ["sw_test_mode_mask_rom"]
+    }
   ]
+
   regressions: [
     {
       name: mask_rom_functest
-      tests: ["chip_mask_rom_keymgr_functest"]
+      tests: ["chip_sw_mask_rom_keymgr_functest"]
     }
   ]
 }
diff --git a/hw/top_earlgrey/dv/chip_sim_cfg.hjson b/hw/top_earlgrey/dv/chip_sim_cfg.hjson
index b7fcf5c..b3497cb 100644
--- a/hw/top_earlgrey/dv/chip_sim_cfg.hjson
+++ b/hw/top_earlgrey/dv/chip_sim_cfg.hjson
@@ -134,8 +134,7 @@
       ]
     }
     {
-      name: sw_test_mode
-      sw_images: ["sw/device/lib/testing/test_rom/test_rom:0"]
+      name: sw_test_mode_common
       run_opts: ["+sw_build_bin_dir={sw_build_dir}/build-bin",
                  "+sw_build_device={sw_build_device}",
                  // Separate individual SW images supplied to +sw_images plusarg by comma.
@@ -143,6 +142,16 @@
       en_run_modes: ["gen_otp_images_mode"]
     }
     {
+      name: sw_test_mode_test_rom
+      sw_images: ["sw/device/lib/testing/test_rom/test_rom:0"]
+      en_run_modes: ["sw_test_mode_common"]
+    }
+    {
+      name: sw_test_mode_mask_rom
+      sw_images: ["sw/device/silicon_creator/mask_rom/mask_rom:0"]
+      en_run_modes: ["sw_test_mode_common"]
+    }
+    {
       name: stub_cpu_mode
       en_run_modes: ["gen_otp_images_mode"]
       run_opts: ["+stub_cpu=1"]
@@ -187,7 +196,7 @@
       name: chip_sw_uart_tx_rx
       uvm_test_seq: chip_sw_uart_tx_rx_vseq
       sw_images: ["sw/device/tests/uart_tx_rx_test:1"]
-      en_run_modes: ["sw_test_mode"]
+      en_run_modes: ["sw_test_mode_test_rom"]
       run_opts: ["+uart_idx=0"]
       reseed: 5
     }
@@ -195,7 +204,7 @@
       name: chip_sw_uart_tx_rx_idx1
       uvm_test_seq: chip_sw_uart_tx_rx_vseq
       sw_images: ["sw/device/tests/uart_tx_rx_test:1"]
-      en_run_modes: ["sw_test_mode"]
+      en_run_modes: ["sw_test_mode_test_rom"]
       run_opts: ["+uart_idx=1"]
       reseed: 5
     }
@@ -203,7 +212,7 @@
       name: chip_sw_uart_tx_rx_idx2
       uvm_test_seq: chip_sw_uart_tx_rx_vseq
       sw_images: ["sw/device/tests/uart_tx_rx_test:1"]
-      en_run_modes: ["sw_test_mode"]
+      en_run_modes: ["sw_test_mode_test_rom"]
       run_opts: ["+uart_idx=2"]
       reseed: 5
     }
@@ -211,7 +220,7 @@
       name: chip_sw_uart_tx_rx_idx3
       uvm_test_seq: chip_sw_uart_tx_rx_vseq
       sw_images: ["sw/device/tests/uart_tx_rx_test:1"]
-      en_run_modes: ["sw_test_mode"]
+      en_run_modes: ["sw_test_mode_test_rom"]
       run_opts: ["+uart_idx=3"]
       reseed: 5
     }
@@ -219,21 +228,21 @@
       name: chip_sw_uart_tx_rx_bootstrap
       uvm_test_seq: chip_sw_uart_tx_rx_vseq
       sw_images: ["sw/device/tests/uart_tx_rx_test:1"]
-      en_run_modes: ["sw_test_mode"]
+      en_run_modes: ["sw_test_mode_test_rom"]
       run_opts: ["+use_spi_load_bootstrap=1"]
     }
     {
       name: chip_sw_uart_rand_baudrate
       uvm_test_seq: chip_sw_uart_rand_baudrate_vseq
       sw_images: ["sw/device/tests/uart_tx_rx_test:1"]
-      en_run_modes: ["sw_test_mode"]
+      en_run_modes: ["sw_test_mode_test_rom"]
       reseed: 20
     }
     {
       name: chip_sw_uart_tx_rx_alt_clk_freq
       uvm_test_seq: chip_sw_uart_rand_baudrate_vseq
       sw_images: ["sw/device/tests/uart_tx_rx_test:1"]
-      en_run_modes: ["sw_test_mode"]
+      en_run_modes: ["sw_test_mode_test_rom"]
       run_opts: ["+use_otp_image=LcStRma", "+use_extclk=1"]
       reseed: 10
     }
@@ -241,7 +250,7 @@
       name: chip_sw_uart_tx_rx_alt_clk_freq_low_speed
       uvm_test_seq: chip_sw_uart_rand_baudrate_vseq
       sw_images: ["sw/device/tests/uart_tx_rx_test:1"]
-      en_run_modes: ["sw_test_mode"]
+      en_run_modes: ["sw_test_mode_test_rom"]
       run_opts: ["+use_otp_image=LcStRma", "+use_extclk=1", "extclk_low_speed_sel=1"]
       reseed: 10
     }
@@ -249,122 +258,122 @@
       name: chip_sw_spi_device_tx_rx
       uvm_test_seq: chip_sw_spi_tx_rx_vseq
       sw_images: ["sw/device/tests/spi_tx_rx_test:1"]
-      en_run_modes: ["sw_test_mode"]
+      en_run_modes: ["sw_test_mode_test_rom"]
     }
     {
       name: chip_sw_gpio
       uvm_test_seq: chip_sw_gpio_vseq
       sw_images: ["sw/device/tests/gpio_test:1"]
-      en_run_modes: ["sw_test_mode"]
+      en_run_modes: ["sw_test_mode_test_rom"]
     }
     {
       name: chip_sw_flash_ctrl_access
       uvm_test_seq: chip_sw_base_vseq
       sw_images: ["sw/device/tests/flash_ctrl_test:1"]
-      en_run_modes: ["sw_test_mode"]
+      en_run_modes: ["sw_test_mode_test_rom"]
     }
     {
       name: chip_sw_lc_ctrl_otp_hw_cfg
       uvm_test_seq: chip_sw_base_vseq
       sw_images: ["sw/device/tests/lc_ctrl_otp_hw_cfg_test:1"]
-      en_run_modes: ["sw_test_mode"]
+      en_run_modes: ["sw_test_mode_test_rom"]
     }
     {
       // Set higher reseed value to reach all kmac_data to lc_ctrl toggle coverage.
       name: chip_sw_lc_ctrl_transition
       uvm_test_seq: chip_sw_lc_ctrl_transition_vseq
       sw_images: ["sw/device/tests/lc_ctrl_transition_test:1"]
-      en_run_modes: ["sw_test_mode"]
+      en_run_modes: ["sw_test_mode_test_rom"]
       reseed: 15
     }
     {
       name: chip_sw_rstmgr_sw_req
       uvm_test_seq: chip_sw_base_vseq
       sw_images: ["sw/device/tests/rstmgr_sw_req_test:1"]
-      en_run_modes: ["sw_test_mode"]
+      en_run_modes: ["sw_test_mode_test_rom"]
     }
     {
       name: chip_sw_pwrmgr_usbdev_wakeup
       uvm_test_seq: chip_sw_base_vseq
       sw_images: ["sw/device/tests/pwrmgr_usbdev_smoketest:1"]
-      en_run_modes: ["sw_test_mode"]
+      en_run_modes: ["sw_test_mode_test_rom"]
       run_opts: ["+sw_test_timeout_ns=4000000"]
     }
     {
       name: chip_sw_pwrmgr_full_aon_reset
       uvm_test_seq: chip_sw_full_aon_reset_vseq
       sw_images: ["sw/device/tests/rstmgr_smoketest:1"]
-      en_run_modes: ["sw_test_mode"]
+      en_run_modes: ["sw_test_mode_test_rom"]
       run_opts: ["+sw_test_timeout_ns=4000000"]
     }
     {
       name: chip_sw_pwrmgr_main_power_glitch_reset
       uvm_test_seq: chip_sw_main_power_glitch_vseq
       sw_images: ["sw/device/tests/pwrmgr_main_power_glitch_test:1"]
-      en_run_modes: ["sw_test_mode"]
+      en_run_modes: ["sw_test_mode_test_rom"]
       run_opts: ["+sw_test_timeout_ns=4000000"]
     }
     {
       name: chip_sw_rv_timer_irq
       uvm_test_seq: chip_sw_base_vseq
       sw_images: ["sw/device/tests/rv_timer_smoketest:1"]
-      en_run_modes: ["sw_test_mode"]
+      en_run_modes: ["sw_test_mode_test_rom"]
     }
     {
       name: chip_sw_aon_timer_irq
       uvm_test_seq: chip_sw_base_vseq
       sw_images: ["sw/device/tests/aon_timer_irq_test:1"]
-      en_run_modes: ["sw_test_mode"]
+      en_run_modes: ["sw_test_mode_test_rom"]
       run_opts: ["+sw_test_timeout_ns=18000000"]
     }
     {
       name: chip_sw_aon_timer_wdog_bite_reset
       uvm_test_seq: chip_sw_base_vseq
       sw_images: ["sw/device/tests/aon_timer_wdog_bite_reset_test:1"]
-      en_run_modes: ["sw_test_mode"]
+      en_run_modes: ["sw_test_mode_test_rom"]
       run_opts: ["+sw_test_timeout_ns=18000000"]
     }
     {
       name: chip_sw_kmac_mode_cshake_test
       uvm_test_seq: chip_sw_base_vseq
       sw_images: ["sw/device/tests/kmac_mode_cshake_test:1"]
-      en_run_modes: ["sw_test_mode"]
+      en_run_modes: ["sw_test_mode_test_rom"]
     }
     {
       name: chip_sw_kmac_mode_kmac_test
       uvm_test_seq: chip_sw_base_vseq
       sw_images: ["sw/device/tests/kmac_mode_kmac_test:1"]
-      en_run_modes: ["sw_test_mode"]
+      en_run_modes: ["sw_test_mode_test_rom"]
     }
     {
       name: chip_sw_kmac_app_rom_test
       uvm_test_seq: chip_sw_base_vseq
       sw_images: ["sw/device/tests/kmac_app_rom_test:1"]
-      en_run_modes: ["sw_test_mode"]
+      en_run_modes: ["sw_test_mode_test_rom"]
     }
     {
       name: chip_sw_kmac_idle_test
       uvm_test_seq: chip_sw_base_vseq
       sw_images: ["sw/device/tests/kmac_idle_test:1"]
-      en_run_modes: ["sw_test_mode"]
+      en_run_modes: ["sw_test_mode_test_rom"]
     }
     {
       name: chip_sw_rom_ctrl_integrity_check_test
       uvm_test_seq: chip_sw_rom_ctrl_integrity_check_vseq
       sw_images: ["sw/device/tests/rom_ctrl_integrity_check_test:1"]
-      en_run_modes: ["sw_test_mode"]
+      en_run_modes: ["sw_test_mode_test_rom"]
     }    
     {
       name: chip_sw_sram_ctrl_execution_main
       uvm_test_seq: chip_sw_sram_ctrl_execution_main_vseq
       sw_images: ["sw/device/tests/sram_ctrl_execution_test_main:1"]
-      en_run_modes: ["sw_test_mode"]
+      en_run_modes: ["sw_test_mode_test_rom"]
     }
     {
       name: chip_sw_coremark
       uvm_test_seq: chip_sw_base_vseq
       sw_images: ["sw/device/benchmarks/coremark/coremark_top_earlgrey:1:external"]
-      en_run_modes: ["sw_test_mode"]
+      en_run_modes: ["sw_test_mode_test_rom"]
       run_opts: ["+en_uart_logger=1",
                  "+sw_test_timeout_ns=22000000"]
     }
@@ -384,13 +393,13 @@
       name: chip_plic_all_irqs
       uvm_test_seq: chip_sw_base_vseq
       sw_images: ["sw/device/tests/plic_all_irqs_test:1"]
-      en_run_modes: ["sw_test_mode"]
+      en_run_modes: ["sw_test_mode_test_rom"]
     }
     {
       name: chip_sw_clkmgr_jitter
       uvm_test_seq: chip_sw_base_vseq
       sw_images: ["sw/device/tests/clkmgr_jitter_test:1"]
-      en_run_modes: ["sw_test_mode"]
+      en_run_modes: ["sw_test_mode_test_rom"]
     }
     {
       name: chip_jtag_csr_rw
diff --git a/hw/top_earlgrey/dv/chip_smoketests.hjson b/hw/top_earlgrey/dv/chip_smoketests.hjson
index 1578caf..929b94f 100644
--- a/hw/top_earlgrey/dv/chip_smoketests.hjson
+++ b/hw/top_earlgrey/dv/chip_smoketests.hjson
@@ -11,99 +11,99 @@
       name: chip_sw_aes_smoketest
       uvm_test_seq: chip_sw_base_vseq
       sw_images: ["sw/device/tests/aes_smoketest:1"]
-      en_run_modes: ["sw_test_mode"]
+      en_run_modes: ["sw_test_mode_test_rom"]
     }
     {
       name: chip_sw_aon_timer_smoketest
       uvm_test_seq: chip_sw_base_vseq
       sw_images: ["sw/device/tests/aon_timer_smoketest:1"]
-      en_run_modes: ["sw_test_mode"]
+      en_run_modes: ["sw_test_mode_test_rom"]
     }
     {
       name: chip_sw_clkmgr_smoketest
       uvm_test_seq: chip_sw_base_vseq
       sw_images: ["sw/device/tests/clkmgr_smoketest:1"]
-      en_run_modes: ["sw_test_mode"]
+      en_run_modes: ["sw_test_mode_test_rom"]
     }
     // TODO(lowrisc/opentitan#7505): Debug CSRNG generate bits mismatch.
     // {
     //  name: chip_sw_csrng_smoketest
     //  uvm_test_seq: chip_sw_base_vseq
     //  sw_images: ["sw/device/tests/csrng_smoketest:1"]
-    //  en_run_modes: ["sw_test_mode"]
+    //  en_run_modes: ["sw_test_mode_test_rom"]
     // }
     {
       name: chip_sw_entropy_src_smoketest
       uvm_test_seq: chip_sw_base_vseq
       sw_images: ["sw/device/tests/entropy_src_smoketest:1"]
-      en_run_modes: ["sw_test_mode"]
+      en_run_modes: ["sw_test_mode_test_rom"]
     }
     {
       name: chip_sw_gpio_smoketest
       uvm_test_seq: chip_sw_gpio_smoke_vseq
       sw_images: ["sw/device/tests/gpio_smoketest:1"]
-      en_run_modes: ["sw_test_mode"]
+      en_run_modes: ["sw_test_mode_test_rom"]
     }
     {
       name: chip_sw_hmac_smoketest
       uvm_test_seq: chip_sw_base_vseq
       sw_images: ["sw/device/tests/hmac_smoketest:1"]
-      en_run_modes: ["sw_test_mode"]
+      en_run_modes: ["sw_test_mode_test_rom"]
     }
     {
       name: chip_sw_kmac_smoketest
       uvm_test_seq: chip_sw_base_vseq
       sw_images: ["sw/device/tests/kmac_smoketest:1"]
-      en_run_modes: ["sw_test_mode"]
+      en_run_modes: ["sw_test_mode_test_rom"]
     }
     {
       name: chip_sw_otbn_smoketest
       uvm_test_seq: chip_sw_base_vseq
       sw_images: ["sw/device/tests/otbn_smoketest:1"]
-      en_run_modes: ["sw_test_mode"]
+      en_run_modes: ["sw_test_mode_test_rom"]
     }
     {
       name: chip_sw_otp_ctrl_smoketest
       uvm_test_seq: chip_sw_base_vseq
       sw_images: ["sw/device/tests/otp_ctrl_smoketest:1"]
-      en_run_modes: ["sw_test_mode"]
+      en_run_modes: ["sw_test_mode_test_rom"]
     }
     {
       name: chip_sw_rv_plic_smoketest
       uvm_test_seq: chip_sw_base_vseq
       sw_images: ["sw/device/tests/rv_plic_smoketest:1"]
-      en_run_modes: ["sw_test_mode"]
+      en_run_modes: ["sw_test_mode_test_rom"]
     }
     {
       name: chip_sw_pwrmgr_smoketest
       uvm_test_seq: chip_sw_base_vseq
       sw_images: ["sw/device/tests/pwrmgr_smoketest:1"]
-      en_run_modes: ["sw_test_mode"]
+      en_run_modes: ["sw_test_mode_test_rom"]
       run_opts: ["+sw_test_timeout_ns=4000000"]
     }
     {
       name: chip_sw_rv_timer_smoketest
       uvm_test_seq: chip_sw_base_vseq
       sw_images: ["sw/device/tests/rv_timer_smoketest:1"]
-      en_run_modes: ["sw_test_mode"]
+      en_run_modes: ["sw_test_mode_test_rom"]
     }
     {
       name: chip_sw_rstmgr_smoketest
       uvm_test_seq: chip_sw_base_vseq
       sw_images: ["sw/device/tests/rstmgr_smoketest:1"]
-      en_run_modes: ["sw_test_mode"]
+      en_run_modes: ["sw_test_mode_test_rom"]
     }
     {
       name: chip_sw_sram_ctrl_smoketest
       uvm_test_seq: chip_sw_base_vseq
       sw_images: ["sw/device/tests/sram_ctrl_smoketest:1"]
-      en_run_modes: ["sw_test_mode"]
+      en_run_modes: ["sw_test_mode_test_rom"]
     }
     {
       name: chip_sw_uart_smoketest
       uvm_test_seq: chip_sw_base_vseq
       sw_images: ["sw/device/tests/uart_smoketest:1"]
-      en_run_modes: ["sw_test_mode"]
+      en_run_modes: ["sw_test_mode_test_rom"]
     }
   ]
   regressions: [
diff --git a/hw/top_earlgrey/dv/env/chip_env_cfg.sv b/hw/top_earlgrey/dv/env/chip_env_cfg.sv
index f61c593..d97c7c4 100644
--- a/hw/top_earlgrey/dv/env/chip_env_cfg.sv
+++ b/hw/top_earlgrey/dv/env/chip_env_cfg.sv
@@ -140,8 +140,8 @@
   //
   // The index (optional) is mapped to the type of SW image (enumerated in sw_type_e). If index is
   // not specified, then `SwTypeTest` is assumed. Flags (optional) are arbitrary strings attached to
-  // the SW image. They can be used to treat the SW image in a specific way. The flag "prebuilt" for
-  // example, is used to set the SW image path correctly.
+  // the SW image. They can be used to treat the SW image in a specific way. The flags "prebuilt"
+  // and "signed" for example, are used to set the SW image path correctly.
   virtual function void parse_sw_images_string(string sw_images_string);
     string sw_images_split[$];
 
@@ -177,6 +177,11 @@
     foreach (sw_images[i]) begin
       if ("prebuilt" inside {sw_image_flags[i]}) begin
         sw_images[i] = $sformatf("%0s/%0s", sw_build_bin_dir, sw_images[i]);
+      end else if ("signed" inside {sw_image_flags[i]}) begin
+        // TODO: support multiple signing keys. See "signing_keys" in
+        // `sw/device/meson.build` for options.
+        sw_images[i] = $sformatf("%0s/%0s_%0s.test_key_0.signed",
+          sw_build_bin_dir, sw_images[i], sw_build_device);
       end else begin
         sw_images[i] = $sformatf("%0s/%0s_%0s", sw_build_bin_dir, sw_images[i], sw_build_device);
       end
diff --git a/sw/device/tests/meson.build b/sw/device/tests/meson.build
index 02a5453..ba77dda 100644
--- a/sw/device/tests/meson.build
+++ b/sw/device/tests/meson.build
@@ -2,10 +2,14 @@
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
-# All tests added to this dictionary will result in build targets that have
-# names starting `sw/device/tests/<test_name>`. They will not contain the
-# subdirectory name, because the build targets are really declared at the bottom
-# of this file, rather than in the subdirectories.
+# All build targets below in `sw_tests` or `sw_signed_tests` will have names
+# starting with `sw/device/tests/<test_name>`. They will not contain the
+# subdirectory name (e.g., `sim_dv/`), because the build targets are really
+# declared in the for loops in this build file.
+
+# All tests added to the `sw_test` dictionary:
+#  - will not be crytographically signed.
+#  - are intended to be launched via the test ROM and OTTF.
 sw_tests = {
   # 'test_name': {
   #   'library': test_lib,
@@ -13,12 +17,10 @@
   # },
 }
 
-# All tests added to this dictionary will result in build targets that have
-# names starting `sw/device/tests/<test_name>`. They will not contain the
-# subdirectory name, because the build targets are really declared at the bottom
-# of this file, rather than in the subdirectories.
-#
-# These tests will link against a ROM_EXT slot A image.
+# All tests added to the `sw_rom_ext_tests` dictionary:
+#  - will be crytographically signed.
+#  - are intended to be launched via the mask ROM and OTTF.
+#  - will link against a ROM_EXT slot A image.
 sw_rom_ext_tests = {
   #   'test_name': {
   #   'library': test_lib,
@@ -931,7 +933,7 @@
   endforeach
 endforeach
 
-# (signed) test binaries loaded with ROM from sw/device/silicon_creator/
+# (signed) test binaries loaded with mask ROM (from sw/device/silicon_creator/)
 foreach sw_test_name, sw_test_info : sw_rom_ext_tests
   foreach device_name, device_lib : sw_lib_arch_core_devices
     sw_test_elf = executable(
diff --git a/sw/host/rom_ext_image_tools/signer/Cargo.lock b/sw/host/rom_ext_image_tools/signer/Cargo.lock
new file mode 100644
index 0000000..ad6d108
--- /dev/null
+++ b/sw/host/rom_ext_image_tools/signer/Cargo.lock
@@ -0,0 +1,319 @@
+# This file is automatically @generated by Cargo.
+# It is not intended for manual editing.
+version = 3
+
+[[package]]
+name = "adler"
+version = "1.0.2"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "f26201604c87b1e01bd3d98f8d5d9a8fcbb815e8cedb41ffccbeb4bf593a35fe"
+
+[[package]]
+name = "anyhow"
+version = "1.0.53"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "94a45b455c14666b85fc40a019e8ab9eb75e3a124e05494f5397122bc9eb06e0"
+
+[[package]]
+name = "autocfg"
+version = "1.0.1"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "cdb031dd78e28731d87d56cc8ffef4a8f36ca26c38fe2de700543e627f8a464a"
+
+[[package]]
+name = "byteorder"
+version = "1.4.3"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "14c189c53d098945499cdfa7ecc63567cf3886b3332b312a5b4585d8d3a6a610"
+
+[[package]]
+name = "cfg-if"
+version = "1.0.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "baf1de4339761588bc0619e3cbc0120ee582ebb74b53b4efbf79117bd2da40fd"
+
+[[package]]
+name = "crc32fast"
+version = "1.3.1"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "a2209c310e29876f7f0b2721e7e26b84aff178aa3da5d091f9bfbf47669e60e3"
+dependencies = [
+ "cfg-if",
+]
+
+[[package]]
+name = "flate2"
+version = "1.0.22"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "1e6988e897c1c9c485f43b47a529cef42fde0547f9d8d41a7062518f1d8fc53f"
+dependencies = [
+ "cfg-if",
+ "crc32fast",
+ "libc",
+ "miniz_oxide",
+]
+
+[[package]]
+name = "goblin"
+version = "0.0.24"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "e3fa261d919c1ae9d1e4533c4a2f99e10938603c4208d56c05bec7a872b661b0"
+dependencies = [
+ "log",
+ "plain",
+ "scroll",
+]
+
+[[package]]
+name = "libc"
+version = "0.2.114"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "b0005d08a8f7b65fb8073cb697aa0b12b631ed251ce73d862ce50eeb52ce3b50"
+
+[[package]]
+name = "log"
+version = "0.4.14"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "51b9bbe6c47d51fc3e1a9b945965946b4c44142ab8792c50835a980d362c2710"
+dependencies = [
+ "cfg-if",
+]
+
+[[package]]
+name = "memchr"
+version = "2.4.1"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "308cc39be01b73d0d18f82a0e7b2a3df85245f84af96fdddc5d202d27e47b86a"
+
+[[package]]
+name = "memoffset"
+version = "0.6.5"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "5aa361d4faea93603064a027415f07bd8e1d5c88c9fbf68bf56a285428fd79ce"
+dependencies = [
+ "autocfg",
+]
+
+[[package]]
+name = "miniz_oxide"
+version = "0.4.4"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "a92518e98c078586bc6c934028adcca4c92a53d6a958196de835170a01d84e4b"
+dependencies = [
+ "adler",
+ "autocfg",
+]
+
+[[package]]
+name = "mundane"
+version = "0.5.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "247854067c4b133a72c3bc06f2e87643fd6db59b960e0169f3a77dfd65a01305"
+dependencies = [
+ "goblin",
+]
+
+[[package]]
+name = "object"
+version = "0.25.3"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "a38f2be3697a57b4060074ff41b44c16870d916ad7877c17696e063257482bc7"
+dependencies = [
+ "flate2",
+ "memchr",
+]
+
+[[package]]
+name = "plain"
+version = "0.2.3"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "b4596b6d070b27117e987119b4dac604f3c58cfb0b191112e24771b2faeac1a6"
+
+[[package]]
+name = "proc-macro2"
+version = "0.4.30"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "cf3d2011ab5c909338f7887f4fc896d35932e29146c12c8d01da6b22a80ba759"
+dependencies = [
+ "unicode-xid 0.1.0",
+]
+
+[[package]]
+name = "proc-macro2"
+version = "1.0.36"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "c7342d5883fbccae1cc37a2353b09c87c9b0f3afd73f5fb9bba687a1f733b029"
+dependencies = [
+ "unicode-xid 0.2.2",
+]
+
+[[package]]
+name = "quote"
+version = "0.6.13"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "6ce23b6b870e8f94f81fb0a363d65d86675884b34a09043c81e5562f11c1f8e1"
+dependencies = [
+ "proc-macro2 0.4.30",
+]
+
+[[package]]
+name = "quote"
+version = "1.0.15"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "864d3e96a899863136fc6e99f3d7cae289dafe43bf2c5ac19b70df7210c0a145"
+dependencies = [
+ "proc-macro2 1.0.36",
+]
+
+[[package]]
+name = "rom_ext_image"
+version = "0.1.0"
+dependencies = [
+ "memoffset",
+ "thiserror",
+ "zerocopy",
+]
+
+[[package]]
+name = "rom_ext_signer"
+version = "0.1.0"
+dependencies = [
+ "anyhow",
+ "mundane",
+ "object",
+ "rom_ext_image",
+ "thiserror",
+ "zerocopy",
+]
+
+[[package]]
+name = "rustc_version"
+version = "0.2.3"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "138e3e0acb6c9fb258b19b67cb8abd63c00679d2851805ea151465464fe9030a"
+dependencies = [
+ "semver",
+]
+
+[[package]]
+name = "scroll"
+version = "0.9.2"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "2f84d114ef17fd144153d608fba7c446b0145d038985e7a8cc5d08bb0ce20383"
+dependencies = [
+ "rustc_version",
+ "scroll_derive",
+]
+
+[[package]]
+name = "scroll_derive"
+version = "0.9.5"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "8f1aa96c45e7f5a91cb7fabe7b279f02fea7126239fc40b732316e8b6a2d0fcb"
+dependencies = [
+ "proc-macro2 0.4.30",
+ "quote 0.6.13",
+ "syn 0.15.44",
+]
+
+[[package]]
+name = "semver"
+version = "0.9.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "1d7eb9ef2c18661902cc47e535f9bc51b78acd254da71d375c2f6720d9a40403"
+dependencies = [
+ "semver-parser",
+]
+
+[[package]]
+name = "semver-parser"
+version = "0.7.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "388a1df253eca08550bef6c72392cfe7c30914bf41df5269b68cbd6ff8f570a3"
+
+[[package]]
+name = "syn"
+version = "0.15.44"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "9ca4b3b69a77cbe1ffc9e198781b7acb0c7365a883670e8f1c1bc66fba79a5c5"
+dependencies = [
+ "proc-macro2 0.4.30",
+ "quote 0.6.13",
+ "unicode-xid 0.1.0",
+]
+
+[[package]]
+name = "syn"
+version = "1.0.86"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "8a65b3f4ffa0092e9887669db0eae07941f023991ab58ea44da8fe8e2d511c6b"
+dependencies = [
+ "proc-macro2 1.0.36",
+ "quote 1.0.15",
+ "unicode-xid 0.2.2",
+]
+
+[[package]]
+name = "synstructure"
+version = "0.12.6"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "f36bdaa60a83aca3921b5259d5400cbf5e90fc51931376a9bd4a0eb79aa7210f"
+dependencies = [
+ "proc-macro2 1.0.36",
+ "quote 1.0.15",
+ "syn 1.0.86",
+ "unicode-xid 0.2.2",
+]
+
+[[package]]
+name = "thiserror"
+version = "1.0.30"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "854babe52e4df1653706b98fcfc05843010039b406875930a70e4d9644e5c417"
+dependencies = [
+ "thiserror-impl",
+]
+
+[[package]]
+name = "thiserror-impl"
+version = "1.0.30"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "aa32fd3f627f367fe16f893e2597ae3c05020f8bba2666a4e6ea73d377e5714b"
+dependencies = [
+ "proc-macro2 1.0.36",
+ "quote 1.0.15",
+ "syn 1.0.86",
+]
+
+[[package]]
+name = "unicode-xid"
+version = "0.1.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "fc72304796d0818e357ead4e000d19c9c174ab23dc11093ac919054d20a6a7fc"
+
+[[package]]
+name = "unicode-xid"
+version = "0.2.2"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "8ccb82d61f80a663efe1f787a51b16b5a51e3314d6ac365b08639f52387b33f3"
+
+[[package]]
+name = "zerocopy"
+version = "0.5.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "5e59ec1d2457bd6c0dd89b50e7d9d6b0b647809bf3f0a59ac85557046950b7b2"
+dependencies = [
+ "byteorder",
+ "zerocopy-derive",
+]
+
+[[package]]
+name = "zerocopy-derive"
+version = "0.3.1"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "a0fbc82b82efe24da867ee52e015e58178684bd9dd64c34e66bdf21da2582a9f"
+dependencies = [
+ "proc-macro2 1.0.36",
+ "syn 1.0.86",
+ "synstructure",
+]