[top/dv] Insert weak pulls on JTAG signals

These weak pulls prevent a simulation issue where Xes leak through the
pinmux module and trigger unkown assertions in other modules (e.g. the
PLIC).

Signed-off-by: Michael Schaffner <msf@opentitan.org>

hw/top_earlgrey/dv/tb/tb.sv

diff --git a/hw/top_earlgrey/dv/tb/tb.sv b/hw/top_earlgrey/dv/tb/tb.sv
index daa26cb..2d750b2 100644
--- a/hw/top_earlgrey/dv/tb/tb.sv
+++ b/hw/top_earlgrey/dv/tb/tb.sv
@@ -172,6 +172,15 @@
   );
 
   // connect signals
+  // TODO: Replace this weak pull to a known value with initialization
+  // in the agent/interface.
+  // Without these pulls, we may get Xes that propagate through the design
+  // (one example is the interference IRQ of the I2C that propagates into the PLIC).
+  assign (weak0, weak1) jtag_tck = 1'b0;
+  assign (weak0, weak1) jtag_tms = 1'b0;
+  assign (weak0, weak1) jtag_trst_n = 1'b0;
+  assign (weak0, weak1) jtag_tdi = 1'b0;
+  assign (weak0, weak1) jtag_tdo = 1'b0;
   assign jtag_tck         = jtag_if.tck;
   assign jtag_tms         = jtag_if.tms;
   assign jtag_trst_n      = jtag_if.trst_n;