[tlul/dv] Fix tlul core file

Update tlul core file to fix tlul compile. Will make another PR to
update format.core to include bind files from all IPs

Signed-off-by: Weicai Yang <weicai@google.com>

hw/ip/rv_plic/fpv/rv_plic_fpv.core

diff --git a/hw/ip/rv_plic/fpv/rv_plic_fpv.core b/hw/ip/rv_plic/fpv/rv_plic_fpv.core
index be40f79..3e1db2a 100644
--- a/hw/ip/rv_plic/fpv/rv_plic_fpv.core
+++ b/hw/ip/rv_plic/fpv/rv_plic_fpv.core
@@ -11,7 +11,6 @@
       - lowrisc:ip:tlul
       - lowrisc:prim:all
       - lowrisc:ip:rv_plic_component
-      - lowrisc:ip:xbar_dv
       # include top-earlgrey in order to test
       # with the top-level configuration
       - lowrisc:systems:top_earlgrey

hw/ip/tlul/dv/Makefile

diff --git a/hw/ip/tlul/dv/Makefile b/hw/ip/tlul/dv/Makefile
index bcd5499..2f87f84 100644
--- a/hw/ip/tlul/dv/Makefile
+++ b/hw/ip/tlul/dv/Makefile
@@ -16,7 +16,7 @@
 DV_DIR          := $(shell dirname $(realpath $(lastword $(MAKEFILE_LIST))))
 export DUT_TOP  := xbar_main
 export TB_TOP   := tb
-FUSESOC_CORE    := lowrisc:ip:xbar_dv:0.1
+FUSESOC_CORE    := lowrisc:dv:xbar_sim:0.1
 COMPILE_KEY     ?= default
 
 # default COV_COMMON_EXCL isn't applicable to xbar, use its own el file

hw/ip/tlul/dv/xbar_sim.core

diff --git a/hw/ip/tlul/dv/xbar_sim.core b/hw/ip/tlul/dv/xbar_sim.core
index 2d10ae2..d015db5 100644
--- a/hw/ip/tlul/dv/xbar_sim.core
+++ b/hw/ip/tlul/dv/xbar_sim.core
@@ -2,8 +2,8 @@
 # Copyright lowRISC contributors.
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
-name: "lowrisc:ip:xbar_dv:0.1"
-description: "xbar_dv"
+name: "lowrisc:dv:xbar_sim:0.1"
+description: "XBAR DV sim target"
 filesets:
   files_dv:
     depend:
@@ -15,7 +15,7 @@
       - lowrisc:dv:mem_model
       - lowrisc:dv:xbar_test:0.1
     files:
-      - tb/xbar_macros.svh: {is_include_file: true}
+      - tb/xbar_macros.svh
       - tb/tb.sv
       - tb/xbar_main_bind.sv
       - tb/xbar_tl_if_connection.sv: {is_include_file: true}