[top_earlgrey] Generated files based on Multi-tiered

This commit is for generating files for top_earlgrey based on the
multi-tiered crossbar update.

Signed-off-by: Eunchan Kim <eunchan@opentitan.org>

hw/top_earlgrey/data/autogen/top_earlgrey.gen.hjson

diff --git a/hw/top_earlgrey/data/autogen/top_earlgrey.gen.hjson b/hw/top_earlgrey/data/autogen/top_earlgrey.gen.hjson
index a803c59..5b014e0 100644
--- a/hw/top_earlgrey/data/autogen/top_earlgrey.gen.hjson
+++ b/hw/top_earlgrey/data/autogen/top_earlgrey.gen.hjson
@@ -610,11 +610,8 @@
           debug_mem
           ram_main
           eflash
-          uart
-          gpio
-          spi_device
+          peri
           flash_ctrl
-          rv_timer
           aes
           hmac
           rv_plic
@@ -627,11 +624,8 @@
           rom
           ram_main
           eflash
-          uart
-          gpio
-          spi_device
+          peri
           flash_ctrl
-          rv_timer
           aes
           hmac
           rv_plic
@@ -648,6 +642,7 @@
           clock: clk_main_i
           reset: rst_main_ni
           pipeline: "false"
+          xbar: false
           inst_type: rv_core_ibex
           pipeline_byp: "true"
         }
@@ -657,6 +652,7 @@
           clock: clk_main_i
           reset: rst_main_ni
           pipeline: "false"
+          xbar: false
           inst_type: rv_core_ibex
           pipeline_byp: "true"
         }
@@ -666,6 +662,7 @@
           clock: clk_main_i
           reset: rst_main_ni
           pipeline_byp: "false"
+          xbar: false
           inst_type: rv_dm
           pipeline: "true"
         }
@@ -678,6 +675,7 @@
           inst_type: rom
           base_addr: 0x00008000
           size_byte: 0x2000
+          xbar: false
           pipeline_byp: "true"
         }
         {
@@ -689,6 +687,7 @@
           inst_type: rv_dm
           base_addr: 0x1A110000
           size_byte: 0x1000
+          xbar: false
           pipeline: "true"
         }
         {
@@ -700,6 +699,7 @@
           inst_type: ram_1p
           base_addr: 0x10000000
           size_byte: 0x10000
+          xbar: false
           pipeline_byp: "true"
         }
         {
@@ -711,40 +711,28 @@
           inst_type: eflash
           base_addr: 0x20000000
           size_byte: 0x80000
+          xbar: false
           pipeline_byp: "true"
         }
         {
-          name: uart
+          name: peri
           type: device
           clock: clk_fixed_i
           reset: rst_fixed_ni
           pipeline_byp: "false"
-          inst_type: uart
-          base_addr: 0x40000000
-          size_byte: 0x1000
+          xbar: true
           pipeline: "true"
-        }
-        {
-          name: gpio
-          type: device
-          clock: clk_fixed_i
-          reset: rst_fixed_ni
-          pipeline_byp: "false"
-          inst_type: gpio
-          base_addr: 0x40010000
-          size_byte: 0x1000
-          pipeline: "true"
-        }
-        {
-          name: spi_device
-          type: device
-          clock: clk_fixed_i
-          reset: rst_fixed_ni
-          pipeline_byp: "false"
-          inst_type: spi_device
-          base_addr: 0x40020000
-          size_byte: 0x1000
-          pipeline: "true"
+          xbar_addr:
+          [
+            {
+              base_addr: 0x40000000
+              size_byte: 0x21000
+            }
+            {
+              base_addr: 0x40080000
+              size_byte: 0x1000
+            }
+          ]
         }
         {
           name: flash_ctrl
@@ -755,17 +743,7 @@
           inst_type: flash_ctrl
           base_addr: 0x40030000
           size_byte: 0x1000
-          pipeline: "true"
-        }
-        {
-          name: rv_timer
-          type: device
-          clock: clk_fixed_i
-          reset: rst_fixed_ni
-          pipeline_byp: "false"
-          inst_type: rv_timer
-          base_addr: 0x40080000
-          size_byte: 0x1000
+          xbar: false
           pipeline: "true"
         }
         {
@@ -777,6 +755,7 @@
           inst_type: hmac
           base_addr: 0x40120000
           size_byte: 0x1000
+          xbar: false
           pipeline: "true"
         }
         {
@@ -788,6 +767,7 @@
           inst_type: aes
           base_addr: 0x40110000
           size_byte: 0x1000
+          xbar: false
           pipeline: "true"
         }
         {
@@ -799,6 +779,7 @@
           base_addr: 0x40090000
           size_byte: 0x1000
           pipeline_byp: "false"
+          xbar: false
           pipeline: "true"
         }
         {
@@ -810,6 +791,7 @@
           base_addr: 0x40070000
           size_byte: 0x1000
           pipeline_byp: "false"
+          xbar: false
           pipeline: "true"
         }
         {
@@ -820,6 +802,7 @@
           pipeline_byp: "false"
           base_addr: 0x40130000
           size_byte: 0x1000
+          xbar: false
           pipeline: "true"
         }
         {
@@ -830,11 +813,96 @@
           pipeline_byp: "false"
           base_addr: 0x40140000
           size_byte: 0x1000
+          xbar: false
           pipeline: "true"
         }
       ]
       clock: clk_main_i
     }
+    {
+      name: peri
+      clock_connections:
+      {
+        clk_peri_i: fixed
+      }
+      reset: rst_peri_ni
+      reset_connections:
+      {
+        rst_peri_ni: sys_fixed
+      }
+      connections:
+      {
+        main:
+        [
+          uart
+          gpio
+          spi_device
+          rv_timer
+        ]
+      }
+      nodes:
+      [
+        {
+          name: main
+          type: host
+          clock: clk_peri_i
+          reset: rst_peri_ni
+          xbar: true
+          pipeline: "false"
+          inst_type: ""
+          pipeline_byp: "true"
+        }
+        {
+          name: uart
+          type: device
+          clock: clk_peri_i
+          reset: rst_peri_ni
+          pipeline: "false"
+          inst_type: uart
+          base_addr: 0x40000000
+          size_byte: 0x1000
+          xbar: false
+          pipeline_byp: "true"
+        }
+        {
+          name: gpio
+          type: device
+          clock: clk_peri_i
+          reset: rst_peri_ni
+          pipeline: "false"
+          inst_type: gpio
+          base_addr: 0x40010000
+          size_byte: 0x1000
+          xbar: false
+          pipeline_byp: "true"
+        }
+        {
+          name: spi_device
+          type: device
+          clock: clk_peri_i
+          reset: rst_peri_ni
+          pipeline: "false"
+          inst_type: spi_device
+          base_addr: 0x40020000
+          size_byte: 0x1000
+          xbar: false
+          pipeline_byp: "true"
+        }
+        {
+          name: rv_timer
+          type: device
+          clock: clk_peri_i
+          reset: rst_peri_ni
+          pipeline: "false"
+          inst_type: rv_timer
+          base_addr: 0x40080000
+          size_byte: 0x1000
+          xbar: false
+          pipeline_byp: "true"
+        }
+      ]
+      clock: clk_peri_i
+    }
   ]
   interrupt_module:
   [