| ${PRJ_DIR}/hw/ip/prim/rtl/prim_assert.sv |
| ${PRJ_DIR}/hw/ip/prim/rtl/prim_flop_2sync.sv |
| ${PRJ_DIR}/hw/ip/prim/rtl/prim_fifo_async.sv |
| ${PRJ_DIR}/hw/ip/prim/rtl/prim_fifo_sync.sv |
| ${PRJ_DIR}/hw/ip/tlul/rtl/top_pkg.sv |
| ${PRJ_DIR}/hw/ip/tlul/rtl/tlul_pkg.sv |
| ${PRJ_DIR}/hw/vendor/pulp_riscv_dbg/src/dm_pkg.sv |
| ${PRJ_DIR}/hw/vendor/pulp_riscv_dbg/debug_rom/debug_rom.sv |
| ${PRJ_DIR}/hw/vendor/pulp_riscv_dbg/src/dm_sba.sv |
| ${PRJ_DIR}/hw/vendor/pulp_riscv_dbg/src/dm_csrs.sv |
| ${PRJ_DIR}/hw/vendor/pulp_riscv_dbg/src/dm_mem.sv |
| ${PRJ_DIR}/hw/vendor/pulp_riscv_dbg/src/dmi_cdc.sv |
| ${PRJ_DIR}/hw/vendor/pulp_riscv_dbg/src/dmi_jtag.sv |
| ${PRJ_DIR}/hw/vendor/pulp_riscv_dbg/src/dmi_jtag_tap.sv |
| ${PRJ_DIR}/hw/ip/tlul/rtl/tlul_adapter_sram.sv |
