| // Copyright lowRISC contributors. |
| // Licensed under the Apache License, Version 2.0, see LICENSE for details. |
| // SPDX-License-Identifier: Apache-2.0 |
| // |
| // xbar_tgl_excl.cfg generated by `topgen.py` tool |
| |
| // [UNSUPPORTED] Exclude unused TL port signals at all hierarchies, wherever port toggle coverage is |
| // enabled. Exercising these reserved signals will result in assertion errors thrown by the design. |
| -node tb.dut*.u_* *tl_*.a_param |
| -node tb.dut*.u_* *tl_*.a_user.rsvd |
| -node tb.dut*.u_* *tl_*.d_param |
| -node tb.dut*.u_* *tl_*.d_opcode[2:1] |
| -node tb.dut*.u_* *tl_*.a_source[7:6] |
| -node tb.dut*.u_* *tl_*.d_source[7:6] |
| -node tb.dut.top_earlgrey *tl_*.a_param |
| -node tb.dut.top_earlgrey *tl_*.a_user.rsvd |
| -node tb.dut.top_earlgrey *tl_*.d_param |
| -node tb.dut.top_earlgrey *tl_*.d_opcode[2:1] |
| -node tb.dut.top_earlgrey *tl_*.a_source[7:6] |
| -node tb.dut.top_earlgrey *tl_*.d_source[7:6] |
| |
| // [LOW_RISK] Exclude the full TL a_address signal on all pass-through hierarchies. We instead look |
| // at the full coverage of this signal directly at the host or at the device. |
| -node tb.dut.top_earlgrey *tl_*.a_address |
| -node tb.dut.top_earlgrey.u_xbar_* tl_*.a_address |
| |
| // [UNR] Exclude unused address bits based on IP address range. It is not possible to cover this. |
| -node tb.dut*.u_rv_dm regs_tl_*i.a_address[20:2] |
| -node tb.dut*.u_rv_dm regs_tl_*i.a_address[23:22] |
| -node tb.dut*.u_rv_dm regs_tl_*i.a_address[29:25] |
| -node tb.dut*.u_rv_dm regs_tl_*i.a_address[31:31] |
| -node tb.dut*.u_rv_dm mem_tl_*i.a_address[15:12] |
| -node tb.dut*.u_rv_dm mem_tl_*i.a_address[31:17] |
| -node tb.dut*.u_rom_ctrl rom_tl_*i.a_address[31:16] |
| -node tb.dut*.u_rom_ctrl regs_tl_*i.a_address[16:7] |
| -node tb.dut*.u_rom_ctrl regs_tl_*i.a_address[23:21] |
| -node tb.dut*.u_rom_ctrl regs_tl_*i.a_address[29:25] |
| -node tb.dut*.u_rom_ctrl regs_tl_*i.a_address[31:31] |
| -node tb.dut*.u_spi_host0 tl_*i.a_address[19:6] |
| -node tb.dut*.u_spi_host0 tl_*i.a_address[29:22] |
| -node tb.dut*.u_spi_host0 tl_*i.a_address[31:31] |
| -node tb.dut*.u_spi_host1 tl_*i.a_address[15:6] |
| -node tb.dut*.u_spi_host1 tl_*i.a_address[19:17] |
| -node tb.dut*.u_spi_host1 tl_*i.a_address[29:22] |
| -node tb.dut*.u_spi_host1 tl_*i.a_address[31:31] |
| -node tb.dut*.u_usbdev tl_*i.a_address[16:12] |
| -node tb.dut*.u_usbdev tl_*i.a_address[19:18] |
| -node tb.dut*.u_usbdev tl_*i.a_address[29:22] |
| -node tb.dut*.u_usbdev tl_*i.a_address[31:31] |
| -node tb.dut*.u_flash_ctrl core_tl_*i.a_address[23:9] |
| -node tb.dut*.u_flash_ctrl core_tl_*i.a_address[29:25] |
| -node tb.dut*.u_flash_ctrl core_tl_*i.a_address[31:31] |
| -node tb.dut*.u_flash_ctrl prim_tl_*i.a_address[14:7] |
| -node tb.dut*.u_flash_ctrl prim_tl_*i.a_address[23:16] |
| -node tb.dut*.u_flash_ctrl prim_tl_*i.a_address[29:25] |
| -node tb.dut*.u_flash_ctrl prim_tl_*i.a_address[31:31] |
| -node tb.dut*.u_flash_ctrl mem_tl_*i.a_address[28:20] |
| -node tb.dut*.u_flash_ctrl mem_tl_*i.a_address[31:30] |
| -node tb.dut*.u_hmac tl_*i.a_address[15:12] |
| -node tb.dut*.u_hmac tl_*i.a_address[19:17] |
| -node tb.dut*.u_hmac tl_*i.a_address[23:21] |
| -node tb.dut*.u_hmac tl_*i.a_address[29:25] |
| -node tb.dut*.u_hmac tl_*i.a_address[31:31] |
| -node tb.dut*.u_kmac tl_*i.a_address[16:12] |
| -node tb.dut*.u_kmac tl_*i.a_address[19:18] |
| -node tb.dut*.u_kmac tl_*i.a_address[23:21] |
| -node tb.dut*.u_kmac tl_*i.a_address[29:25] |
| -node tb.dut*.u_kmac tl_*i.a_address[31:31] |
| -node tb.dut*.u_aes tl_*i.a_address[19:8] |
| -node tb.dut*.u_aes tl_*i.a_address[23:21] |
| -node tb.dut*.u_aes tl_*i.a_address[29:25] |
| -node tb.dut*.u_aes tl_*i.a_address[31:31] |
| -node tb.dut*.u_entropy_src tl_*i.a_address[16:8] |
| -node tb.dut*.u_entropy_src tl_*i.a_address[19:19] |
| -node tb.dut*.u_entropy_src tl_*i.a_address[23:21] |
| -node tb.dut*.u_entropy_src tl_*i.a_address[29:25] |
| -node tb.dut*.u_entropy_src tl_*i.a_address[31:31] |
| -node tb.dut*.u_csrng tl_*i.a_address[15:7] |
| -node tb.dut*.u_csrng tl_*i.a_address[17:17] |
| -node tb.dut*.u_csrng tl_*i.a_address[19:19] |
| -node tb.dut*.u_csrng tl_*i.a_address[23:21] |
| -node tb.dut*.u_csrng tl_*i.a_address[29:25] |
| -node tb.dut*.u_csrng tl_*i.a_address[31:31] |
| -node tb.dut*.u_edn0 tl_*i.a_address[15:7] |
| -node tb.dut*.u_edn0 tl_*i.a_address[19:19] |
| -node tb.dut*.u_edn0 tl_*i.a_address[23:21] |
| -node tb.dut*.u_edn0 tl_*i.a_address[29:25] |
| -node tb.dut*.u_edn0 tl_*i.a_address[31:31] |
| -node tb.dut*.u_edn1 tl_*i.a_address[18:7] |
| -node tb.dut*.u_edn1 tl_*i.a_address[23:21] |
| -node tb.dut*.u_edn1 tl_*i.a_address[29:25] |
| -node tb.dut*.u_edn1 tl_*i.a_address[31:31] |
| -node tb.dut*.u_rv_plic tl_*i.a_address[29:28] |
| -node tb.dut*.u_rv_plic tl_*i.a_address[31:31] |
| -node tb.dut*.u_otbn tl_*i.a_address[19:18] |
| -node tb.dut*.u_otbn tl_*i.a_address[23:21] |
| -node tb.dut*.u_otbn tl_*i.a_address[29:25] |
| -node tb.dut*.u_otbn tl_*i.a_address[31:31] |
| -node tb.dut*.u_keymgr tl_*i.a_address[17:8] |
| -node tb.dut*.u_keymgr tl_*i.a_address[19:19] |
| -node tb.dut*.u_keymgr tl_*i.a_address[23:21] |
| -node tb.dut*.u_keymgr tl_*i.a_address[29:25] |
| -node tb.dut*.u_keymgr tl_*i.a_address[31:31] |
| -node tb.dut*.u_rv_core_ibex cfg_tl_*i.a_address[15:8] |
| -node tb.dut*.u_rv_core_ibex cfg_tl_*i.a_address[23:21] |
| -node tb.dut*.u_rv_core_ibex cfg_tl_*i.a_address[29:25] |
| -node tb.dut*.u_rv_core_ibex cfg_tl_*i.a_address[31:31] |
| -node tb.dut*.u_sram_ctrl_main regs_tl_*i.a_address[17:5] |
| -node tb.dut*.u_sram_ctrl_main regs_tl_*i.a_address[23:21] |
| -node tb.dut*.u_sram_ctrl_main regs_tl_*i.a_address[29:25] |
| -node tb.dut*.u_sram_ctrl_main regs_tl_*i.a_address[31:31] |
| -node tb.dut*.u_sram_ctrl_main ram_tl_*i.a_address[27:17] |
| -node tb.dut*.u_sram_ctrl_main ram_tl_*i.a_address[31:29] |
| -node tb.dut*.u_uart0 tl_*i.a_address[29:6] |
| -node tb.dut*.u_uart0 tl_*i.a_address[31:31] |
| -node tb.dut*.u_uart1 tl_*i.a_address[15:6] |
| -node tb.dut*.u_uart1 tl_*i.a_address[29:17] |
| -node tb.dut*.u_uart1 tl_*i.a_address[31:31] |
| -node tb.dut*.u_uart2 tl_*i.a_address[16:6] |
| -node tb.dut*.u_uart2 tl_*i.a_address[29:18] |
| -node tb.dut*.u_uart2 tl_*i.a_address[31:31] |
| -node tb.dut*.u_uart3 tl_*i.a_address[15:6] |
| -node tb.dut*.u_uart3 tl_*i.a_address[29:18] |
| -node tb.dut*.u_uart3 tl_*i.a_address[31:31] |
| -node tb.dut*.u_i2c0 tl_*i.a_address[18:7] |
| -node tb.dut*.u_i2c0 tl_*i.a_address[29:20] |
| -node tb.dut*.u_i2c0 tl_*i.a_address[31:31] |
| -node tb.dut*.u_i2c1 tl_*i.a_address[15:7] |
| -node tb.dut*.u_i2c1 tl_*i.a_address[18:17] |
| -node tb.dut*.u_i2c1 tl_*i.a_address[29:20] |
| -node tb.dut*.u_i2c1 tl_*i.a_address[31:31] |
| -node tb.dut*.u_i2c2 tl_*i.a_address[16:7] |
| -node tb.dut*.u_i2c2 tl_*i.a_address[18:18] |
| -node tb.dut*.u_i2c2 tl_*i.a_address[29:20] |
| -node tb.dut*.u_i2c2 tl_*i.a_address[31:31] |
| -node tb.dut*.u_pattgen tl_*i.a_address[16:6] |
| -node tb.dut*.u_pattgen tl_*i.a_address[29:20] |
| -node tb.dut*.u_pattgen tl_*i.a_address[31:31] |
| -node tb.dut*.u_pwm_aon tl_*i.a_address[15:7] |
| -node tb.dut*.u_pwm_aon tl_*i.a_address[17:17] |
| -node tb.dut*.u_pwm_aon tl_*i.a_address[21:19] |
| -node tb.dut*.u_pwm_aon tl_*i.a_address[29:23] |
| -node tb.dut*.u_pwm_aon tl_*i.a_address[31:31] |
| -node tb.dut*.u_gpio tl_*i.a_address[17:6] |
| -node tb.dut*.u_gpio tl_*i.a_address[29:19] |
| -node tb.dut*.u_gpio tl_*i.a_address[31:31] |
| -node tb.dut*.u_spi_device tl_*i.a_address[15:13] |
| -node tb.dut*.u_spi_device tl_*i.a_address[17:17] |
| -node tb.dut*.u_spi_device tl_*i.a_address[29:19] |
| -node tb.dut*.u_spi_device tl_*i.a_address[31:31] |
| -node tb.dut*.u_rv_timer tl_*i.a_address[19:9] |
| -node tb.dut*.u_rv_timer tl_*i.a_address[29:21] |
| -node tb.dut*.u_rv_timer tl_*i.a_address[31:31] |
| -node tb.dut*.u_pwrmgr_aon tl_*i.a_address[21:7] |
| -node tb.dut*.u_pwrmgr_aon tl_*i.a_address[29:23] |
| -node tb.dut*.u_pwrmgr_aon tl_*i.a_address[31:31] |
| -node tb.dut*.u_rstmgr_aon tl_*i.a_address[15:7] |
| -node tb.dut*.u_rstmgr_aon tl_*i.a_address[21:17] |
| -node tb.dut*.u_rstmgr_aon tl_*i.a_address[29:23] |
| -node tb.dut*.u_rstmgr_aon tl_*i.a_address[31:31] |
| -node tb.dut*.u_clkmgr_aon tl_*i.a_address[16:7] |
| -node tb.dut*.u_clkmgr_aon tl_*i.a_address[21:18] |
| -node tb.dut*.u_clkmgr_aon tl_*i.a_address[29:23] |
| -node tb.dut*.u_clkmgr_aon tl_*i.a_address[31:31] |
| -node tb.dut*.u_pinmux_aon tl_*i.a_address[16:12] |
| -node tb.dut*.u_pinmux_aon tl_*i.a_address[21:19] |
| -node tb.dut*.u_pinmux_aon tl_*i.a_address[29:23] |
| -node tb.dut*.u_pinmux_aon tl_*i.a_address[31:31] |
| -node tb.dut*.u_otp_ctrl core_tl_*i.a_address[15:13] |
| -node tb.dut*.u_otp_ctrl core_tl_*i.a_address[19:18] |
| -node tb.dut*.u_otp_ctrl core_tl_*i.a_address[29:21] |
| -node tb.dut*.u_otp_ctrl core_tl_*i.a_address[31:31] |
| -node tb.dut*.u_otp_ctrl prim_tl_*i.a_address[12:5] |
| -node tb.dut*.u_otp_ctrl prim_tl_*i.a_address[15:14] |
| -node tb.dut*.u_otp_ctrl prim_tl_*i.a_address[19:18] |
| -node tb.dut*.u_otp_ctrl prim_tl_*i.a_address[29:21] |
| -node tb.dut*.u_otp_ctrl prim_tl_*i.a_address[31:31] |
| -node tb.dut*.u_lc_ctrl tl_*i.a_address[17:8] |
| -node tb.dut*.u_lc_ctrl tl_*i.a_address[19:19] |
| -node tb.dut*.u_lc_ctrl tl_*i.a_address[29:21] |
| -node tb.dut*.u_lc_ctrl tl_*i.a_address[31:31] |
| -node tb.dut*.u_sensor_ctrl tl_*i.a_address[15:6] |
| -node tb.dut*.u_sensor_ctrl tl_*i.a_address[18:17] |
| -node tb.dut*.u_sensor_ctrl tl_*i.a_address[21:20] |
| -node tb.dut*.u_sensor_ctrl tl_*i.a_address[29:23] |
| -node tb.dut*.u_sensor_ctrl tl_*i.a_address[31:31] |
| -node tb.dut*.u_alert_handler tl_*i.a_address[15:11] |
| -node tb.dut*.u_alert_handler tl_*i.a_address[17:17] |
| -node tb.dut*.u_alert_handler tl_*i.a_address[19:19] |
| -node tb.dut*.u_alert_handler tl_*i.a_address[29:21] |
| -node tb.dut*.u_alert_handler tl_*i.a_address[31:31] |
| -node tb.dut*.u_sram_ctrl_ret_aon regs_tl_*i.a_address[19:5] |
| -node tb.dut*.u_sram_ctrl_ret_aon regs_tl_*i.a_address[21:21] |
| -node tb.dut*.u_sram_ctrl_ret_aon regs_tl_*i.a_address[29:23] |
| -node tb.dut*.u_sram_ctrl_ret_aon regs_tl_*i.a_address[31:31] |
| -node tb.dut*.u_sram_ctrl_ret_aon ram_tl_*i.a_address[20:12] |
| -node tb.dut*.u_sram_ctrl_ret_aon ram_tl_*i.a_address[29:23] |
| -node tb.dut*.u_sram_ctrl_ret_aon ram_tl_*i.a_address[31:31] |
| -node tb.dut*.u_aon_timer_aon tl_*i.a_address[15:6] |
| -node tb.dut*.u_aon_timer_aon tl_*i.a_address[21:19] |
| -node tb.dut*.u_aon_timer_aon tl_*i.a_address[29:23] |
| -node tb.dut*.u_aon_timer_aon tl_*i.a_address[31:31] |
| -node tb.dut*.u_sysrst_ctrl_aon tl_*i.a_address[15:8] |
| -node tb.dut*.u_sysrst_ctrl_aon tl_*i.a_address[21:18] |
| -node tb.dut*.u_sysrst_ctrl_aon tl_*i.a_address[29:23] |
| -node tb.dut*.u_sysrst_ctrl_aon tl_*i.a_address[31:31] |
| -node tb.dut*.u_adc_ctrl_aon tl_*i.a_address[17:7] |
| -node tb.dut*.u_adc_ctrl_aon tl_*i.a_address[21:19] |
| -node tb.dut*.u_adc_ctrl_aon tl_*i.a_address[29:23] |
| -node tb.dut*.u_adc_ctrl_aon tl_*i.a_address[31:31] |
| -node tb.dut*.u_ast tl_*i.a_address[18:10] |
| -node tb.dut*.u_ast tl_*i.a_address[21:20] |
| -node tb.dut*.u_ast tl_*i.a_address[29:23] |
| -node tb.dut*.u_ast tl_*i.a_address[31:31] |