commit 4450404880b733cfef8eab88a097c89380bc9a45
author Srikrishna Iyer <sriyer@google.com> Fri Sep 09 14:25:37 2022 -0700
committer Srikrishna Iyer <46467186+sriyerg@users.noreply.github.com> Sat Sep 10 01:38:32 2022 -0700
tree e1f5f8a3782ce9d08862e74507c430fa4850f1db
parent 2b01e35b379f2d08ddd3af79f2555ea8faa7e5a8

[dv, pwm] Remove pwn_en from agent

This commit removes the pwn_en signal from the pwm
monitor / interface since it is tied off at the
block itself.

Instead, an assertion check is added to pwm testbench.

This is done to support chip level which only
exposes the PWM output at the chip IOs.

Signed-off-by: Srikrishna Iyer <sriyer@google.com>

hw/dv/sv/pwm_monitor/pwm_if.sv

diff --git a/hw/dv/sv/pwm_monitor/pwm_if.sv b/hw/dv/sv/pwm_monitor/pwm_if.sv
index 65a8924..bd592e2 100644
--- a/hw/dv/sv/pwm_monitor/pwm_if.sv
+++ b/hw/dv/sv/pwm_monitor/pwm_if.sv
@@ -2,16 +2,15 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-interface pwm_if;
-  // core clock
-  logic clk;
-  logic rst_n;
+interface pwm_if (
+  input logic clk,
+  input logic rst_n
+);
 
   logic pwm;
-  logic pwm_en;
-
 
   clocking cb @(posedge clk);
-    input pwm, pwm_en;
+    input pwm;
   endclocking
+
 endinterface : pwm_if

hw/ip/pwm/dv/pwm_sim.core

diff --git a/hw/ip/pwm/dv/pwm_sim.core b/hw/ip/pwm/dv/pwm_sim.core
index 72619e2..f62f7c1 100644
--- a/hw/ip/pwm/dv/pwm_sim.core
+++ b/hw/ip/pwm/dv/pwm_sim.core
@@ -8,6 +8,7 @@
   files_rtl:
     depend:
       - lowrisc:ip:pwm:0.1
+      - lowrisc:prim:assert
 
   files_dv:
     depend:

hw/ip/pwm/dv/tb.sv

diff --git a/hw/ip/pwm/dv/tb.sv b/hw/ip/pwm/dv/tb.sv
index 5c72edf..17bbf67 100644
--- a/hw/ip/pwm/dv/tb.sv
+++ b/hw/ip/pwm/dv/tb.sv
@@ -13,6 +13,7 @@
   // macro includes
   `include "uvm_macros.svh"
   `include "dv_macros.svh"
+  `include "prim_assert.sv"
 
   localparam PWM_NUM_CHANNELS = pwm_reg_pkg::NOutputs;
 
@@ -28,7 +29,7 @@
   clk_rst_if clk_rst_if(.clk(clk), .rst_n(rst_n));
   clk_rst_if clk_rst_core_if(.clk(clk_core), .rst_n(rst_core_n));
   pins_if #(1) devmode_if(devmode);
-  pwm_if  pwm_if[PWM_NUM_CHANNELS]();
+  pwm_if  pwm_if[PWM_NUM_CHANNELS](.clk(clk), .rst_n(rst_n));
   tl_if tl_if(.clk(clk), .rst_n(rst_n));
 
   `DV_ALERT_IF_CONNECT
@@ -51,12 +52,10 @@
     .cio_pwm_en_o  (cio_pwm_en)
   );
 
+  `ASSERT(PwmEnTiedHigh_A, cio_pwm_en == '1, clk, rst_n)
 
   for (genvar i = 0; i < PWM_NUM_CHANNELS; i++) begin : gen_mux
-    assign pwm_if[i].clk    = clk_core;
-    assign pwm_if[i].rst_n  = rst_core_n;
-    assign pwm_if[i].pwm    = cio_pwm[i];
-    assign pwm_if[i].pwm_en = cio_pwm_en[i];
+    assign pwm_if[i].pwm = cio_pwm[i];
   end
 
   genvar n;