| commit | 2b01e35b379f2d08ddd3af79f2555ea8faa7e5a8 | [log] [tgz] |
|---|---|---|
| author | Srikrishna Iyer <sriyer@google.com> | Fri Sep 09 14:21:54 2022 -0700 |
| committer | Srikrishna Iyer <46467186+sriyerg@users.noreply.github.com> | Sat Sep 10 01:38:32 2022 -0700 |
| tree | 9c9d9716cee3f22a579daec2afe7da59c05a4f8c | |
| parent | 11741fbe4845bd06835a9576de9bae80e86ec50a [diff] |
[dv, uart_agent] Delay TX by 1ps At the chip level, UART IOs are muxed with other IOs. If multiple interfaces are connected to the same chip IOs, with muxes selects selecting the function, the IO may undergo 0->1->0 transition in the same timestep. Since UART is an asynchronous protocol, the monitor ends up picking up the glitch value erroneously as the start of a new transaction. To prevent this, we delay the incoming uart_tx by 1ps, which functionally has no impact. Signed-off-by: Srikrishna Iyer <sriyer@google.com>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
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