[dif/kmac] Add autogen'd IRQ DIFs for KMAC. This partially addresses #8142, by checking-in auto-generated IRQ DIFs and supporting typedefs. These DIFs are not yet integrated into the source tree, but will be in a following commit. This continues the longer term goal of completely auto-generating all IRQ DIFs, as described in #8142. Signed-off-by: Timothy Trippel <ttrippel@google.com>
diff --git a/sw/device/lib/dif/autogen/dif_kmac_autogen.c b/sw/device/lib/dif/autogen/dif_kmac_autogen.c new file mode 100644 index 0000000..1116160 --- /dev/null +++ b/sw/device/lib/dif/autogen/dif_kmac_autogen.c
@@ -0,0 +1,178 @@ +// Copyright lowRISC contributors. +// Licensed under the Apache License, Version 2.0, see LICENSE for details. +// SPDX-License-Identifier: Apache-2.0 + +// This file is auto-generated. + +#include "sw/device/lib/dif/dif_kmac.h" + +#include "kmac_regs.h" // Generated. + +/** + * Get the corresponding interrupt register bit offset. INTR_STATE, + * INTR_ENABLE and INTR_TEST registers have the same bit offsets, so this + * routine can be reused. + */ +static bool kmac_get_irq_bit_index(dif_kmac_irq_t irq, + bitfield_bit32_index_t *index_out) { + switch (irq) { + case kDifKmacIrqKmacDone: + *index_out = KMAC_INTR_STATE_KMAC_DONE_BIT; + break; + case kDifKmacIrqFifoEmpty: + *index_out = KMAC_INTR_STATE_FIFO_EMPTY_BIT; + break; + case kDifKmacIrqKmacErr: + *index_out = KMAC_INTR_STATE_KMAC_ERR_BIT; + break; + default: + return false; + } + + return true; +} + +OT_WARN_UNUSED_RESULT +dif_result_t dif_kmac_irq_get_state(const dif_kmac_t *kmac, + dif_kmac_irq_state_snapshot_t *snapshot) { + if (kmac == NULL || snapshot == NULL) { + return kDifBadArg; + } + + *snapshot = mmio_region_read32(kmac->base_addr, KMAC_INTR_STATE_REG_OFFSET); + + return kDifOk; +} + +OT_WARN_UNUSED_RESULT +dif_result_t dif_kmac_irq_is_pending(const dif_kmac_t *kmac, dif_kmac_irq_t irq, + bool *is_pending) { + if (kmac == NULL || is_pending == NULL) { + return kDifBadArg; + } + + bitfield_bit32_index_t index; + if (!kmac_get_irq_bit_index(irq, &index)) { + return kDifBadArg; + } + + uint32_t intr_state_reg = + mmio_region_read32(kmac->base_addr, KMAC_INTR_STATE_REG_OFFSET); + + *is_pending = bitfield_bit32_read(intr_state_reg, index); + + return kDifOk; +} + +OT_WARN_UNUSED_RESULT +dif_result_t dif_kmac_irq_acknowledge(const dif_kmac_t *kmac, + dif_kmac_irq_t irq) { + if (kmac == NULL) { + return kDifBadArg; + } + + bitfield_bit32_index_t index; + if (!kmac_get_irq_bit_index(irq, &index)) { + return kDifBadArg; + } + + // Writing to the register clears the corresponding bits (Write-one clear). + uint32_t intr_state_reg = bitfield_bit32_write(0, index, true); + mmio_region_write32(kmac->base_addr, KMAC_INTR_STATE_REG_OFFSET, + intr_state_reg); + + return kDifOk; +} + +OT_WARN_UNUSED_RESULT +dif_result_t dif_kmac_irq_get_enabled(const dif_kmac_t *kmac, + dif_kmac_irq_t irq, dif_toggle_t *state) { + if (kmac == NULL || state == NULL) { + return kDifBadArg; + } + + bitfield_bit32_index_t index; + if (!kmac_get_irq_bit_index(irq, &index)) { + return kDifBadArg; + } + + uint32_t intr_enable_reg = + mmio_region_read32(kmac->base_addr, KMAC_INTR_ENABLE_REG_OFFSET); + + bool is_enabled = bitfield_bit32_read(intr_enable_reg, index); + *state = is_enabled ? kDifToggleEnabled : kDifToggleDisabled; + + return kDifOk; +} + +OT_WARN_UNUSED_RESULT +dif_result_t dif_kmac_irq_set_enabled(const dif_kmac_t *kmac, + dif_kmac_irq_t irq, dif_toggle_t state) { + if (kmac == NULL) { + return kDifBadArg; + } + + bitfield_bit32_index_t index; + if (!kmac_get_irq_bit_index(irq, &index)) { + return kDifBadArg; + } + + uint32_t intr_enable_reg = + mmio_region_read32(kmac->base_addr, KMAC_INTR_ENABLE_REG_OFFSET); + + bool enable_bit = (state == kDifToggleEnabled) ? true : false; + intr_enable_reg = bitfield_bit32_write(intr_enable_reg, index, enable_bit); + mmio_region_write32(kmac->base_addr, KMAC_INTR_ENABLE_REG_OFFSET, + intr_enable_reg); + + return kDifOk; +} + +OT_WARN_UNUSED_RESULT +dif_result_t dif_kmac_irq_force(const dif_kmac_t *kmac, dif_kmac_irq_t irq) { + if (kmac == NULL) { + return kDifBadArg; + } + + bitfield_bit32_index_t index; + if (!kmac_get_irq_bit_index(irq, &index)) { + return kDifBadArg; + } + + uint32_t intr_test_reg = bitfield_bit32_write(0, index, true); + mmio_region_write32(kmac->base_addr, KMAC_INTR_TEST_REG_OFFSET, + intr_test_reg); + + return kDifOk; +} + +OT_WARN_UNUSED_RESULT +dif_result_t dif_kmac_irq_disable_all( + const dif_kmac_t *kmac, dif_kmac_irq_enable_snapshot_t *snapshot) { + if (kmac == NULL) { + return kDifBadArg; + } + + // Pass the current interrupt state to the caller, if requested. + if (snapshot != NULL) { + *snapshot = + mmio_region_read32(kmac->base_addr, KMAC_INTR_ENABLE_REG_OFFSET); + } + + // Disable all interrupts. + mmio_region_write32(kmac->base_addr, KMAC_INTR_ENABLE_REG_OFFSET, 0u); + + return kDifOk; +} + +OT_WARN_UNUSED_RESULT +dif_result_t dif_kmac_irq_restore_all( + const dif_kmac_t *kmac, const dif_kmac_irq_enable_snapshot_t *snapshot) { + if (kmac == NULL || snapshot == NULL) { + return kDifBadArg; + } + + mmio_region_write32(kmac->base_addr, KMAC_INTR_ENABLE_REG_OFFSET, *snapshot); + + return kDifOk; +}
diff --git a/sw/device/lib/dif/autogen/dif_kmac_autogen.h b/sw/device/lib/dif/autogen/dif_kmac_autogen.h new file mode 100644 index 0000000..5e3e77c --- /dev/null +++ b/sw/device/lib/dif/autogen/dif_kmac_autogen.h
@@ -0,0 +1,170 @@ +// Copyright lowRISC contributors. +// Licensed under the Apache License, Version 2.0, see LICENSE for details. +// SPDX-License-Identifier: Apache-2.0 + +#ifndef OPENTITAN_SW_DEVICE_LIB_DIF_AUTOGEN_DIF_KMAC_AUTOGEN_H_ +#define OPENTITAN_SW_DEVICE_LIB_DIF_AUTOGEN_DIF_KMAC_AUTOGEN_H_ + +// This file is auto-generated. + +/** + * @file + * @brief <a href="/hw/ip/kmac/doc/">KMAC</a> Device Interface Functions + */ + +#include <stdbool.h> +#include <stdint.h> + +#include "sw/device/lib/base/macros.h" +#include "sw/device/lib/base/mmio.h" +#include "sw/device/lib/dif/dif_base.h" + +#ifdef __cplusplus +extern "C" { +#endif // __cplusplus + +/** + * A handle to kmac. + * + * This type should be treated as opaque by users. + */ +typedef struct dif_kmac { + /** + * The base address for the kmac hardware registers. + */ + mmio_region_t base_addr; +} dif_kmac_t; + +/** + * A kmac interrupt request type. + */ +typedef enum dif_kmac_irq { + /** + * KMAC/SHA3 absorbing has been completed + */ + kDifKmacIrqKmacDone = 0, + /** + * Message FIFO empty condition + */ + kDifKmacIrqFifoEmpty = 1, + /** + * KMAC/SHA3 error occurred. ERR_CODE register shows the details + */ + kDifKmacIrqKmacErr = 2, +} dif_kmac_irq_t; + +/** + * A snapshot of the state of the interrupts for this IP. + * + * This is an opaque type, to be used with the `dif_kmac_irq_get_state()` + * function. + */ +typedef uint32_t dif_kmac_irq_state_snapshot_t; + +/** + * A snapshot of the enablement state of the interrupts for this IP. + * + * This is an opaque type, to be used with the + * `dif_kmac_irq_disable_all()` and `dif_kmac_irq_restore_all()` + * functions. + */ +typedef uint32_t dif_kmac_irq_enable_snapshot_t; + +/** + * Returns whether a particular interrupt is currently pending. + * + * @param kmac A kmac handle. + * @param[out] snapshot Out-param for interrupt state snapshot. + * @return The result of the operation. + */ +OT_WARN_UNUSED_RESULT +dif_result_t dif_kmac_irq_get_state(const dif_kmac_t *kmac, + dif_kmac_irq_state_snapshot_t *snapshot); + +/** + * Returns whether a particular interrupt is currently pending. + * + * @param kmac A kmac handle. + * @param irq An interrupt request. + * @param[out] is_pending Out-param for whether the interrupt is pending. + * @return The result of the operation. + */ +OT_WARN_UNUSED_RESULT +dif_result_t dif_kmac_irq_is_pending(const dif_kmac_t *kmac, dif_kmac_irq_t irq, + bool *is_pending); + +/** + * Acknowledges a particular interrupt, indicating to the hardware that it has + * been successfully serviced. + * + * @param kmac A kmac handle. + * @param irq An interrupt request. + * @return The result of the operation. + */ +OT_WARN_UNUSED_RESULT +dif_result_t dif_kmac_irq_acknowledge(const dif_kmac_t *kmac, + dif_kmac_irq_t irq); + +/** + * Checks whether a particular interrupt is currently enabled or disabled. + * + * @param kmac A kmac handle. + * @param irq An interrupt request. + * @param[out] state Out-param toggle state of the interrupt. + * @return The result of the operation. + */ +OT_WARN_UNUSED_RESULT +dif_result_t dif_kmac_irq_get_enabled(const dif_kmac_t *kmac, + dif_kmac_irq_t irq, dif_toggle_t *state); + +/** + * Sets whether a particular interrupt is currently enabled or disabled. + * + * @param kmac A kmac handle. + * @param irq An interrupt request. + * @param state The new toggle state for the interrupt. + * @return The result of the operation. + */ +OT_WARN_UNUSED_RESULT +dif_result_t dif_kmac_irq_set_enabled(const dif_kmac_t *kmac, + dif_kmac_irq_t irq, dif_toggle_t state); + +/** + * Forces a particular interrupt, causing it to be serviced as if hardware had + * asserted it. + * + * @param kmac A kmac handle. + * @param irq An interrupt request. + * @return The result of the operation. + */ +OT_WARN_UNUSED_RESULT +dif_result_t dif_kmac_irq_force(const dif_kmac_t *kmac, dif_kmac_irq_t irq); + +/** + * Disables all interrupts, optionally snapshotting all enable states for later + * restoration. + * + * @param kmac A kmac handle. + * @param[out] snapshot Out-param for the snapshot; may be `NULL`. + * @return The result of the operation. + */ +OT_WARN_UNUSED_RESULT +dif_result_t dif_kmac_irq_disable_all(const dif_kmac_t *kmac, + dif_kmac_irq_enable_snapshot_t *snapshot); + +/** + * Restores interrupts from the given (enable) snapshot. + * + * @param kmac A kmac handle. + * @param snapshot A snapshot to restore from. + * @return The result of the operation. + */ +OT_WARN_UNUSED_RESULT +dif_result_t dif_kmac_irq_restore_all( + const dif_kmac_t *kmac, const dif_kmac_irq_enable_snapshot_t *snapshot); + +#ifdef __cplusplus +} // extern "C" +#endif // __cplusplus + +#endif // OPENTITAN_SW_DEVICE_LIB_DIF_AUTOGEN_DIF_KMAC_AUTOGEN_H_
diff --git a/sw/device/lib/dif/autogen/dif_kmac_autogen_unittest.cc b/sw/device/lib/dif/autogen/dif_kmac_autogen_unittest.cc new file mode 100644 index 0000000..909f65c --- /dev/null +++ b/sw/device/lib/dif/autogen/dif_kmac_autogen_unittest.cc
@@ -0,0 +1,287 @@ +// Copyright lowRISC contributors. +// Licensed under the Apache License, Version 2.0, see LICENSE for details. +// SPDX-License-Identifier: Apache-2.0 + +// This file is auto-generated. + +#include "sw/device/lib/dif/dif_kmac.h" + +#include "gtest/gtest.h" +#include "sw/device/lib/base/mmio.h" +#include "sw/device/lib/base/testing/mock_mmio.h" + +#include "kmac_regs.h" // Generated. + +namespace dif_kmac_autogen_unittest { +namespace { +using ::mock_mmio::MmioTest; +using ::mock_mmio::MockDevice; +using ::testing::Test; + +class KmacTest : public Test, public MmioTest { + protected: + dif_kmac_t kmac_ = {.base_addr = dev().region()}; +}; + +using ::testing::Eq; + +class IrqGetStateTest : public KmacTest {}; + +TEST_F(IrqGetStateTest, NullArgs) { + dif_kmac_irq_state_snapshot_t irq_snapshot = 0; + + EXPECT_EQ(dif_kmac_irq_get_state(nullptr, &irq_snapshot), kDifBadArg); + + EXPECT_EQ(dif_kmac_irq_get_state(&kmac_, nullptr), kDifBadArg); + + EXPECT_EQ(dif_kmac_irq_get_state(nullptr, nullptr), kDifBadArg); +} + +TEST_F(IrqGetStateTest, SuccessAllRaised) { + dif_kmac_irq_state_snapshot_t irq_snapshot = 0; + + EXPECT_READ32(KMAC_INTR_STATE_REG_OFFSET, + std::numeric_limits<uint32_t>::max()); + EXPECT_EQ(dif_kmac_irq_get_state(&kmac_, &irq_snapshot), kDifOk); + EXPECT_EQ(irq_snapshot, std::numeric_limits<uint32_t>::max()); +} + +TEST_F(IrqGetStateTest, SuccessNoneRaised) { + dif_kmac_irq_state_snapshot_t irq_snapshot = 0; + + EXPECT_READ32(KMAC_INTR_STATE_REG_OFFSET, 0); + EXPECT_EQ(dif_kmac_irq_get_state(&kmac_, &irq_snapshot), kDifOk); + EXPECT_EQ(irq_snapshot, 0); +} + +class IrqIsPendingTest : public KmacTest {}; + +TEST_F(IrqIsPendingTest, NullArgs) { + bool is_pending; + + EXPECT_EQ(dif_kmac_irq_is_pending(nullptr, kDifKmacIrqKmacDone, &is_pending), + kDifBadArg); + + EXPECT_EQ(dif_kmac_irq_is_pending(&kmac_, kDifKmacIrqKmacDone, nullptr), + kDifBadArg); + + EXPECT_EQ(dif_kmac_irq_is_pending(nullptr, kDifKmacIrqKmacDone, nullptr), + kDifBadArg); +} + +TEST_F(IrqIsPendingTest, BadIrq) { + bool is_pending; + // All interrupt CSRs are 32 bit so interrupt 32 will be invalid. + EXPECT_EQ(dif_kmac_irq_is_pending(&kmac_, static_cast<dif_kmac_irq_t>(32), + &is_pending), + kDifBadArg); +} + +TEST_F(IrqIsPendingTest, Success) { + bool irq_state; + + // Get the first IRQ state. + irq_state = false; + EXPECT_READ32(KMAC_INTR_STATE_REG_OFFSET, + {{KMAC_INTR_STATE_KMAC_DONE_BIT, true}}); + EXPECT_EQ(dif_kmac_irq_is_pending(&kmac_, kDifKmacIrqKmacDone, &irq_state), + kDifOk); + EXPECT_TRUE(irq_state); + + // Get the last IRQ state. + irq_state = true; + EXPECT_READ32(KMAC_INTR_STATE_REG_OFFSET, + {{KMAC_INTR_STATE_KMAC_ERR_BIT, false}}); + EXPECT_EQ(dif_kmac_irq_is_pending(&kmac_, kDifKmacIrqKmacErr, &irq_state), + kDifOk); + EXPECT_FALSE(irq_state); +} + +class IrqAcknowledgeTest : public KmacTest {}; + +TEST_F(IrqAcknowledgeTest, NullArgs) { + EXPECT_EQ(dif_kmac_irq_acknowledge(nullptr, kDifKmacIrqKmacDone), kDifBadArg); +} + +TEST_F(IrqAcknowledgeTest, BadIrq) { + EXPECT_EQ(dif_kmac_irq_acknowledge(nullptr, static_cast<dif_kmac_irq_t>(32)), + kDifBadArg); +} + +TEST_F(IrqAcknowledgeTest, Success) { + // Clear the first IRQ state. + EXPECT_WRITE32(KMAC_INTR_STATE_REG_OFFSET, + {{KMAC_INTR_STATE_KMAC_DONE_BIT, true}}); + EXPECT_EQ(dif_kmac_irq_acknowledge(&kmac_, kDifKmacIrqKmacDone), kDifOk); + + // Clear the last IRQ state. + EXPECT_WRITE32(KMAC_INTR_STATE_REG_OFFSET, + {{KMAC_INTR_STATE_KMAC_ERR_BIT, true}}); + EXPECT_EQ(dif_kmac_irq_acknowledge(&kmac_, kDifKmacIrqKmacErr), kDifOk); +} + +class IrqGetEnabledTest : public KmacTest {}; + +TEST_F(IrqGetEnabledTest, NullArgs) { + dif_toggle_t irq_state; + + EXPECT_EQ(dif_kmac_irq_get_enabled(nullptr, kDifKmacIrqKmacDone, &irq_state), + kDifBadArg); + + EXPECT_EQ(dif_kmac_irq_get_enabled(&kmac_, kDifKmacIrqKmacDone, nullptr), + kDifBadArg); + + EXPECT_EQ(dif_kmac_irq_get_enabled(nullptr, kDifKmacIrqKmacDone, nullptr), + kDifBadArg); +} + +TEST_F(IrqGetEnabledTest, BadIrq) { + dif_toggle_t irq_state; + + EXPECT_EQ(dif_kmac_irq_get_enabled(&kmac_, static_cast<dif_kmac_irq_t>(32), + &irq_state), + kDifBadArg); +} + +TEST_F(IrqGetEnabledTest, Success) { + dif_toggle_t irq_state; + + // First IRQ is enabled. + irq_state = kDifToggleDisabled; + EXPECT_READ32(KMAC_INTR_ENABLE_REG_OFFSET, + {{KMAC_INTR_ENABLE_KMAC_DONE_BIT, true}}); + EXPECT_EQ(dif_kmac_irq_get_enabled(&kmac_, kDifKmacIrqKmacDone, &irq_state), + kDifOk); + EXPECT_EQ(irq_state, kDifToggleEnabled); + + // Last IRQ is disabled. + irq_state = kDifToggleEnabled; + EXPECT_READ32(KMAC_INTR_ENABLE_REG_OFFSET, + {{KMAC_INTR_ENABLE_KMAC_ERR_BIT, false}}); + EXPECT_EQ(dif_kmac_irq_get_enabled(&kmac_, kDifKmacIrqKmacErr, &irq_state), + kDifOk); + EXPECT_EQ(irq_state, kDifToggleDisabled); +} + +class IrqSetEnabledTest : public KmacTest {}; + +TEST_F(IrqSetEnabledTest, NullArgs) { + dif_toggle_t irq_state = kDifToggleEnabled; + + EXPECT_EQ(dif_kmac_irq_set_enabled(nullptr, kDifKmacIrqKmacDone, irq_state), + kDifBadArg); +} + +TEST_F(IrqSetEnabledTest, BadIrq) { + dif_toggle_t irq_state = kDifToggleEnabled; + + EXPECT_EQ(dif_kmac_irq_set_enabled(&kmac_, static_cast<dif_kmac_irq_t>(32), + irq_state), + kDifBadArg); +} + +TEST_F(IrqSetEnabledTest, Success) { + dif_toggle_t irq_state; + + // Enable first IRQ. + irq_state = kDifToggleEnabled; + EXPECT_MASK32(KMAC_INTR_ENABLE_REG_OFFSET, + {{KMAC_INTR_ENABLE_KMAC_DONE_BIT, 0x1, true}}); + EXPECT_EQ(dif_kmac_irq_set_enabled(&kmac_, kDifKmacIrqKmacDone, irq_state), + kDifOk); + + // Disable last IRQ. + irq_state = kDifToggleDisabled; + EXPECT_MASK32(KMAC_INTR_ENABLE_REG_OFFSET, + {{KMAC_INTR_ENABLE_KMAC_ERR_BIT, 0x1, false}}); + EXPECT_EQ(dif_kmac_irq_set_enabled(&kmac_, kDifKmacIrqKmacErr, irq_state), + kDifOk); +} + +class IrqForceTest : public KmacTest {}; + +TEST_F(IrqForceTest, NullArgs) { + EXPECT_EQ(dif_kmac_irq_force(nullptr, kDifKmacIrqKmacDone), kDifBadArg); +} + +TEST_F(IrqForceTest, BadIrq) { + EXPECT_EQ(dif_kmac_irq_force(nullptr, static_cast<dif_kmac_irq_t>(32)), + kDifBadArg); +} + +TEST_F(IrqForceTest, Success) { + // Force first IRQ. + EXPECT_WRITE32(KMAC_INTR_TEST_REG_OFFSET, + {{KMAC_INTR_TEST_KMAC_DONE_BIT, true}}); + EXPECT_EQ(dif_kmac_irq_force(&kmac_, kDifKmacIrqKmacDone), kDifOk); + + // Force last IRQ. + EXPECT_WRITE32(KMAC_INTR_TEST_REG_OFFSET, + {{KMAC_INTR_TEST_KMAC_ERR_BIT, true}}); + EXPECT_EQ(dif_kmac_irq_force(&kmac_, kDifKmacIrqKmacErr), kDifOk); +} + +class IrqDisableAllTest : public KmacTest {}; + +TEST_F(IrqDisableAllTest, NullArgs) { + dif_kmac_irq_enable_snapshot_t irq_snapshot = 0; + + EXPECT_EQ(dif_kmac_irq_disable_all(nullptr, &irq_snapshot), kDifBadArg); + + EXPECT_EQ(dif_kmac_irq_disable_all(nullptr, nullptr), kDifBadArg); +} + +TEST_F(IrqDisableAllTest, SuccessNoSnapshot) { + EXPECT_WRITE32(KMAC_INTR_ENABLE_REG_OFFSET, 0); + EXPECT_EQ(dif_kmac_irq_disable_all(&kmac_, nullptr), kDifOk); +} + +TEST_F(IrqDisableAllTest, SuccessSnapshotAllDisabled) { + dif_kmac_irq_enable_snapshot_t irq_snapshot = 0; + + EXPECT_READ32(KMAC_INTR_ENABLE_REG_OFFSET, 0); + EXPECT_WRITE32(KMAC_INTR_ENABLE_REG_OFFSET, 0); + EXPECT_EQ(dif_kmac_irq_disable_all(&kmac_, &irq_snapshot), kDifOk); + EXPECT_EQ(irq_snapshot, 0); +} + +TEST_F(IrqDisableAllTest, SuccessSnapshotAllEnabled) { + dif_kmac_irq_enable_snapshot_t irq_snapshot = 0; + + EXPECT_READ32(KMAC_INTR_ENABLE_REG_OFFSET, + std::numeric_limits<uint32_t>::max()); + EXPECT_WRITE32(KMAC_INTR_ENABLE_REG_OFFSET, 0); + EXPECT_EQ(dif_kmac_irq_disable_all(&kmac_, &irq_snapshot), kDifOk); + EXPECT_EQ(irq_snapshot, std::numeric_limits<uint32_t>::max()); +} + +class IrqRestoreAllTest : public KmacTest {}; + +TEST_F(IrqRestoreAllTest, NullArgs) { + dif_kmac_irq_enable_snapshot_t irq_snapshot = 0; + + EXPECT_EQ(dif_kmac_irq_restore_all(nullptr, &irq_snapshot), kDifBadArg); + + EXPECT_EQ(dif_kmac_irq_restore_all(&kmac_, nullptr), kDifBadArg); + + EXPECT_EQ(dif_kmac_irq_restore_all(nullptr, nullptr), kDifBadArg); +} + +TEST_F(IrqRestoreAllTest, SuccessAllEnabled) { + dif_kmac_irq_enable_snapshot_t irq_snapshot = + std::numeric_limits<uint32_t>::max(); + + EXPECT_WRITE32(KMAC_INTR_ENABLE_REG_OFFSET, + std::numeric_limits<uint32_t>::max()); + EXPECT_EQ(dif_kmac_irq_restore_all(&kmac_, &irq_snapshot), kDifOk); +} + +TEST_F(IrqRestoreAllTest, SuccessAllDisabled) { + dif_kmac_irq_enable_snapshot_t irq_snapshot = 0; + + EXPECT_WRITE32(KMAC_INTR_ENABLE_REG_OFFSET, 0); + EXPECT_EQ(dif_kmac_irq_restore_all(&kmac_, &irq_snapshot), kDifOk); +} + +} // namespace +} // namespace dif_kmac_autogen_unittest